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Signal FPGA pin | AV3 M18 | AV2 M17 | AV1 V20 | AV0 U19 | Speed grade | SDRAM | Temp grade | Status |
---|---|---|---|---|---|---|---|---|
TE0600-02[V|B] | 0 | 0 | 0 | 0 | 2 | 2x128MBit | C | obsolete |
TE0600-02[V|B]I | 0 | 0 | 0 | 1 | 2 | 2x128MBit | I | obsolete |
TE0600-02[V|B]F | 0 | 0 | 1 | 0 | 3 | 2x128MBit | C | obsolete |
TE0600-02[V|B]IF | 0 | 0 | 1 | 1 | 3 | 2x128MBit | I | obsolete |
TE0600-02[V|B]MF | 0 | 1 | 0 | 0 | 3 | 2x512MBit | C | obsolete |
TE0600-03[V|B] | 0 | 0 | 0 | 0 | 2 | 2x128MBit | C | full production |
TE0600-03[V|B]I | 0 | 0 | 0 | 1 | 2 | 2x128MBit | I | full production |
TE0600-03[V|B]F | 0 | 0 | 1 | 0 | 3 | 2x128MBit | C | full production |
TE0600-03[V|B]IF | 0 | 0 | 1 | 1 | 3 | 2x128MBit | I | full production |
TE0600-03[V|B]MF | 0 | 1 | 0 | 0 | 3 | 2x512MBit | C | full production |
Assembly variants pin coding
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