...
Scroll Title |
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anchor | Table_DRH |
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title | Design Revision History |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Vivado | Project Built | Authors | Description |
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2019-06-19 | 2018.3 | TE0820-test_board_noprebuilt-vivado_2018.3-build_06_20190619073300.zip TE0820-test_board-vivado_2018.3-build_06_20190619073243.zip | John Hartfiel | - new assembly variants
- USB2 only (change PS IP and device tree)
- FSBL changes
| 2019-04-01 | 2018.3 | TE0820-test_board_noprebuilt-vivado_2018.3-build_03_20190401130135.zip TE0820-test_board-vivado_2018.3-build_03_20190401130123.zip | John Hartfiel | - renamed ...D variantes to ...A
| 2019-02-21 | 2018.3 | TE0820-test_board_noprebuilt-vivado_2018.3-build_01_20190221103025.zip TE0820-test_board-vivado_2018.3-build_01_20190221102913.zip | John Hartfiel | - TE Script update
- rework of the FSBLs
- SI5338 CLKBuilder Pro Project
- some additional Linux features
- MAC from EEPROM
- new assembly variants
- remove special compiler flags, which was needed in 2018.2
| 2018-10-31 | 2018.2 | TE0820-test_board_noprebuilt-vivado_2018.2-build_03_20181031164506.zip TE0820-test_board-vivado_2018.2-build_03_20181031164452.zip | John Hartfiel | - new assembly variants
- update optional petalinux startup init script
| 2018-09-12 | 2018.2 | TE0820-test_board_noprebuilt-vivado_2018.2-build_03_20180912094615.zip TE0820-test_board-vivado_2018.2-build_03_20180912094558.zip | John Hartfiel | - correction:
- TE0820-03-4EV-1EA has 2GB DDR, now 2GB instead of 1GB is initialised
- small changes on DDR setup of TE0820-02-2EG-1EE
| 2018-08-15 | 2018.2 | TE0820-test_board-vivado_2018.2-build_01_20180706212937.zip TE0820-test_board_noprebuilt-vivado_2018.2-build_01_20180706212952.zip | John Hartfiel | - different design for REV03
- small petalinux changes
- IO renaming
- additional notes for FSBL generated with Win SDK
- changed *.bif
| 2018-06-19 | 2017.4 | TE0820-test_board-vivado_2017.4-build_10_20180619160713.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_10_20180619160728.zip | John Hartfiel | - bugfix board part files BANK1 MIO voltages
- Add "dummy" PS USB3 parameter so solve problems with some USB2 devices
| 2018-05-24 | 2017.4 | TE0820-test_board-vivado_2017.4-build_10_20180524151356.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_10_20180524151342.zip | John Hartfiel | - solved Linux Flash issue
- new assembly variant
| 2018-04-25 | 2017.4 | TE0820-test_board-vivado_2017.4-build_07_20180425134435.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_07_20180425134459.zip | John Hartfiel | | 2018-02-06 | 2017.4 | TE0820-test_board-vivado_2017.4-build_06_20180206203359.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_06_20180206203414.zip | John Hartfiel | | 2018-02-01 | 2017.4 | TE0820-test_board-vivado_2017.4-build_05_20180201084319.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_05_20180201094724.zip | John Hartfiel | | 2018-01-24 | 2017.4 | TE0820-test_board-vivado_2017.4-build_05_20180124085247.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_05_20180124085303.zip | John Hartfiel | - rework board part files
- solved USB, QSPI and PHy issue
| 2017-11-21 | 2017.2 | TE0820-test_board-vivado_2017.2-build_05_20171121160552.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171121160606.zip | John Hartfiel | - solved SD SDX Cards Problem
- Separate csv name for all assembly variants
| 2017-11-20 | 2017.2 | TE0820-test_board-vivado_2017.2-build_05_20171120162931.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171120162851.zip | John Hartfiel | | 2017-10-19 | 2017.2 | TE0820-test_board-vivado_2017.2-build_05_20171019104824.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171019104837.zip | John Hartfiel | |
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...
Scroll Title |
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anchor | Table_HWM |
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title | Hardware Modules |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | EMMC | Others | Notes |
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TE0820-ES1 | es1 | REV01 | 1GB | 64MB | 4GB | NA | Not longer supported by vivado | TE0820-02-02EG-1E | 2eg_1e_1gb | REV02 | 1GB | 64MB | 4GB | NA | NA | TE0820-02-02EG-1E3 | 2eg_1e_1gb | REV02 | 1GB | 64MB | 4GB | 2.5 mm connectors | NA | TE0820-02-02CG-1E | 2cg_1e_1gb | REV02 | 1GB | 64MB | 4GB | NA | NA | TE0820-02-03EG-1E | 3eg_1e_1gb | REV02 | 1GB | 64MB | 4GB | NA | NA | TE0820-02-03EG-1E3 | 3eg_1e_1gb | REV02 | 1GB | 64MB | 4GB | 2.5 mm connectors | NA | TE0820-02-03CG-1E | 3cg_1e_1gb | REV02 | 1GB | 64MB | 4GB | NA | NA | TE0820-02-02EG-1EA | 2eg_1e_1gb | REV02 | 1GB | 128MB | 4GB | NA | NA | TE0820-02-02EG-1EL | 2eg_1e_1gb | REV02 | 1GB | 128MB | 4GB | 2.5 mm connectors | NA | TE0820-02-02CG-1EA | 2cg_1e_1gb | REV02 | 1GB | 128MB | 4GB | NA | NA | TE0820-02-03EG-1EA | 3eg_1e_1gb | REV02 | 1GB | 128MB | 4GB | NA | NA | TE0820-02-03EG-1EL | 3eg_1e_1gb | REV02 | 1GB | 128MB | 4GB | 2.5 mm connectors | NA | TE0820-02-03CG-1EA | 3cg_1e_1gb | REV02 | 1GB | 128MB | 4GB | NA | NA | TE0820-02-04CG-1EA | 4cg_1e_1gb | REV02 | 1GB | 128MB | 4GB | NA | NA | TE0820-03-04EV-1EA | 4ev_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-02CG-1EA | 2cg_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-02EG-1EA | 2eg_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-02EG-1EL | 2eg_1e_2gb | REV03 | 2GB | 128MB | 4GB | 2.5 mm connectors | NA | TE0820-03-03CG-1EA | 3cg_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-04CG-1EA | 4cg_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-03EG-1EA | 3eg_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-03EG-1EL | 3eg_1e_2gb | REV03 | 2GB | 128MB | 4GB | 2.5 mm connectors | NA |
|
Design supports following carriers:
TE0820-03-2AI21FA | 2cg_1i_2gb | REV03 | 2GB | 128MB | 8GB | NA | NA | TE0820-03-2BE21FL | 2eg_1e_2gb | REV03 | 2GB | 128MB | 8GB | 2.5 mm connectors | NA | TE0820-03-3AI210A | 3cg_1i_2gb | REV03 | 2GB | 128MB | 0GB | NA | NA | TE0820-03-3BE21FA | 3eg_1e_2gb | REV03 | 2GB | 128MB | 4GB | NA | NA | TE0820-03-3BE21FL | 3eg_1e_2gb | REV03 | 2GB | 128MB | 4GB | 2.5 mm connectors | NA |
|
Design supports following carriers:
Scroll Title |
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anchor | Table_HWC |
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title | Hardware Carrier |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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|
Scroll Title |
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anchor | Table_HWC |
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title | Hardware Carrier |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Carrier Model | Notes |
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TE0701 | | TE0703 | Important: See | TE0703 | - Important: See restrictions on usage with 7 Serie Carriers: 4 x 5 cm carriers
- Used as reference carrier.
| TE0705 | | TE0706 | | TEBA0841 | - Important: See restrictions on usage with 7 Serie Carriers: 4 x 5 SoM Carriers
- No SD Slot available, pins goes to Pin Header
- For TEBA0841 REV01, please contact TE support
|
|
...
Type | Note |
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DDR |
|
QSPI | MIO |
SD0 | MIO |
SD1 | MIO |
I2C0 | MIO |
UART0 | MIO |
GPIO0 | MIO |
SWDT0..1 |
|
TTC0..3 |
|
GEM3 | MIO | MIO |
USB0 | MIO, USB2 only | USB0 | MIO, USB2 and USB3 are activated. USB3 need SI5338 initialisation and is only needed to solve problems with some USB sticks. |
Constrains
Basic module constrains
...
Code Block |
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|
#include <configs/platform-auto.h>
#define CONFIG_SYS_BOOTM_LEN 0xF000000
#define DFU_ALT_INFO_RAM \
"dfu_ram_info=" \
"setenv dfu_alt_info " \
"image.ub ram $netstart 0x1e00000\0" \
"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
#define DFU_ALT_INFO_MMC \
"dfu_mmc_info=" \
"set dfu_alt_info " \
"${kernel_image} fat 0 1\\\\;" \
"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
" \
"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
/*Required for uartless designs */
#ifndef CONFIG_BAUDRATE
#define CONFIG_BAUDRATE 115200
#ifdef CONFIG_DEBUG_UART
#undef CONFIG_DEBUG_UART
#endif
#endif
/*Define CONFIG_ZYNQMP_EEPROM here and its necessaries in u-boot menuconfig if you had EEPROM memory. */
#define CONFIG_ZYNQMP_EEPROM
#ifdef CONFIG_ZYNQMP_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_CMD_EEPROM
#define CONFIG_ZYNQ_EEPROM_BUS 0
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50
#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA
#endif
|
Device Tree
thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
/*Required for uartless designs */
#ifndef CONFIG_BAUDRATE
#define CONFIG_BAUDRATE 115200
#ifdef CONFIG_DEBUG_UART
#undef CONFIG_DEBUG_UART
#endif
#endif
/*Define CONFIG_ZYNQMP_EEPROM here and its necessaries in u-boot menuconfig if you had EEPROM memory. */
#define CONFIG_ZYNQMP_EEPROM
#ifdef CONFIG_ZYNQMP_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_CMD_EEPROM
#define CONFIG_ZYNQ_EEPROM_BUS 0
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50
#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0xFA
#endif
|
Device Tree
Code Block |
---|
|
/include/ "system-conf.dtsi"
/ {
};
/* SDIO */
&sdhci1 {
disable-wp;
no-1-8-v;
};
/* ETH PHY */
&gem3 {
status = "okay";
ethernet_phy0: ethernet-phy@0 {
compatible = "marvell,88e1510";
device_type = "ethernet-phy";
reg = <1>;
};
};
/* USB 2.0 */
/* USB */
&dwc3_0 {
|
Code Block |
---|
|
/include/ "system-conf.dtsi"
/ {
};
/* SDIO */
&sdhci1 {
disable-wp;
no-1-8-v;
};
/* ETH PHY */
&gem3 {
status = "okay";
ethernet_phy0: ethernet-phy@0 {
compatible dr_mode = "marvell,88e1510host";
device_typemaximum-speed = "ethernethigh-physpeed";
/delete-property/phy-names;
/delete-property/phys;
reg = <1>/delete-property/snps,usb3_lpm_capable;
snps,dis_u2_susphy_quirk;
} snps,dis_u3_susphy_quirk;
};
/* USB 2.0 */
&dwc3_0 {
status = "okay";usb0 {
dr_modestatus = "hostokay";
maximum/delete-speed = "high-speed"property/ clocks;
/delete-property/phy clock-names;
/delete-property/physclocks = <0x3 0x20>;
/delete-property/snps,usb3_lpm_capableclock-names = "bus_clk";
};
/* QSPI PHY */
&qspi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash0: flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
};
};
|
Kernel
Start with petalinux-config -c kernel
...
Scroll Title |
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anchor | Table_dch |
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title | Document change history. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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widths | 2*,*,3*,4* |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Document Revision | Authors | Description |
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Page info |
---|
| modified-date |
---|
| modified-date |
---|
dateFormat | yyyy-MM-dd |
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|
| Page info |
---|
| current-version |
---|
| current-version |
---|
prefix | v. |
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|
| Page info |
---|
| modified-user |
---|
| modified-user |
---|
|
| - design changes
- new variants
| 2019-04-01 | v.53 | John Hartfiel | - some notes
- renamed ..D variants to ...A
| 2018-09-21 | v.47 | John Hartfiel | - 2018.3 release finished (include design reworks)
| | v.43 | John Hartfiel | - Update Design files for 2GB variants
- rebuilt petalinux for optional init script
| | v.41 | John Hartfiel | - Update Design files for 2GB variants
| | v.40 | John Hartfiel | | | v.38 | John Hartfiel | | | v.34 | John Hartfiel | | | v.29 | John Hartfiel | | 2018-02-06 | v.27 | John Hartfiel | | 2018-01-29 | v.26 | John Hartfiel | | 2018-01-24 | v.25 | John Hartfiel | | 2018-01-10 | v.24 | John Hartfiel | | 2017-12-20 | v.23 | John Hartfiel | - Typo correction
- Update HW Module Table Description
| 2017-11-21 | v.19 | John Hartfiel | | 2017-11-20 | v.18 | John Hartfiel | - Design Update
- Add Variants with 128MB Flash
| 2017-11-13 | v.16 | John Hartfiel | | 2017-11-06 | v.15 | John Hartfiel | | 2017-10-23 | v.13 | John Hartfiel | - Update Key Features section
- Style Update Additional Software section
| 2017-10-19 | v.9 | John Hartfiel | | 2017-09-11 | v.1 | | Initial release |
| All | Page info |
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| modified-users |
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| modified-users |
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|
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|
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...