Page History

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Date	Vivado	Project Built	Authors	Description
2018-09-12	2018.2	TE0820-test_board_noprebuilt-vivado_2018.2-build_03_20180912094615.zip TE0820-test_board-vivado_2018.2-build_03_20180912094558.zip	John Hartfiel	correction: TE0820-03-4EV-1EA has 2GB DDR, now 2GB instead of 1GB is initialised small changes on DDR setup of TE0820-02-2EG-1EE
2018-08-15	2018.2	TE0820-test_board-vivado_2018.2-build_01_20180706212937.zip TE0820-test_board_noprebuilt-vivado_2018.2-build_01_20180706212952.zip	John Hartfiel	different design for REV03 small petalinux changes IO renaming additional notes for FSBL generated with Win SDK changed *.bif
2018-06-19	2017.4	TE0820-test_board-vivado_2017.4-build_10_20180619160713.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_10_20180619160728.zip	John Hartfiel	bugfix board part files BANK1 MIO voltages Add "dummy" PS USB3 parameter so solve problems with some USB2 devices
2018-05-24	2017.4	TE0820-test_board-vivado_2017.4-build_10_20180524151356.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_10_20180524151342.zip	John Hartfiel	solved Linux Flash issue new assembly variant
2018-04-25	2017.4	TE0820-test_board-vivado_2017.4-build_07_20180425134435.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_07_20180425134459.zip	John Hartfiel	new assembly variants
2018-02-06	2017.4	TE0820-test_board-vivado_2017.4-build_06_20180206203359.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_06_20180206203414.zip	John Hartfiel	solved JTAG/Linux issue
2018-02-01	2017.4	TE0820-test_board-vivado_2017.4-build_05_20180201084319.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_05_20180201094724.zip	John Hartfiel	board part csv update
2018-01-24	2017.4	TE0820-test_board-vivado_2017.4-build_05_20180124085247.zip TE0820-test_board_noprebuilt-vivado_2017.4-build_05_20180124085303.zip	John Hartfiel	rework board part files solved USB, QSPI and PHy issue
2017-11-21	2017.2	TE0820-test_board-vivado_2017.2-build_05_20171121160552.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171121160606.zip	John Hartfiel	solved SD SDX Cards Problem Separate csv name for all assembly variants
2017-11-20	2017.2	TE0820-test_board-vivado_2017.2-build_05_20171120162931.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171120162851.zip	John Hartfiel	solved SD WP Problem
2017-10-19	2017.2	TE0820-test_board-vivado_2017.2-build_05_20171019104824.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171019104837.zip	John Hartfiel	initial release

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Module Model	Board Part Short Name	PCB Revision Support	DDR	QSPI Flash	Others	Notes
~~TE0820-ES1~~	~~es1~~	REV01	1GB	64		use slower DDR speed Xilinx has stopped ES1 support with 2018.2, please use 2017.4 reference design for ES1
TE0820-02-2EG-1E	2eg_1e	REV02	1GB	64
TE0820-02-2EG-1E3	2eg_1e	REV02	1GB	64	2.5 mm Samtec connectors
TE0820-02-2EG-1EA	2eg_1e	REV02	1GB	128
TE0820-02-2EG-1EE	2eg_1ee	REV02	2GB	128
TE0820-02-2EG-1EL	2eg_1e	REV02	1GB	128	2.5 mm Samtec connectors
TE0820-02-2CG-1E	2cg_1e	REV02	1GB	64
TE0820-02-2CG-1EA	2cg_1e	REV02	1GB	128
TE0820-02-3EG-1E	3eg_1e	REV02	1GB	64
TE0820-02-3EG-1E3	3eg_1e	REV02	1GB	64	2.5 mm Samtec connectors
TE0820-02-3EG-1EA	3eg_1e	REV02	1GB	128
TE0820-02-3EG-1EL	3eg_1e	REV02	1GB	128	2.5 mm Samtec connectors
TE0820-02-3CG-1E	3cg_1e	REV02	1GB	64
TE0820-02-3CG-1EA	3cg_1e	REV02	1GB	128
TE0820-02-4CG-1EA	4cg_1e	REV02	1GB	128
TE0820-03-4EV-1EA	4ev_1e	REV03	1GB2GB	128