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titleDesign Revision History

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DateVivadoProject BuiltAuthorsDescription
2019-10-292018.3TE0820-test_board_noprebuilt-vivado_2018.3-build_09_20191029071045.zip
TE0820-test_board-vivado_2018.3-build_09_20191029071028.zip
John Hartfiel
  • New assembly variants
2019-08-0908-ß92018.3TE0820-test_board_noprebuilt-vivado_2018.3-build_07_20190809084040.zip
TE0820-test_board-vivado_2018.3-build_07_20190809083901.zip
John Hartfiel
  • bugfix fsbl (removed second PSU init)
2019-06-192018.3TE0820-test_board_noprebuilt-vivado_2018.3-build_06_20190619073300.zip
TE0820-test_board-vivado_2018.3-build_06_20190619073243.zip
John Hartfiel
  • new assembly variants
  • USB2 only (change PS IP and device tree)
  • FSBL changes
2019-04-012018.3TE0820-test_board_noprebuilt-vivado_2018.3-build_03_20190401130135.zip
TE0820-test_board-vivado_2018.3-build_03_20190401130123.zip
John Hartfiel
  • renamed ...D variantes to ...A
2019-02-212018.3

TE0820-test_board_noprebuilt-vivado_2018.3-build_01_20190221103025.zip
TE0820-test_board-vivado_2018.3-build_01_20190221102913.zip

John Hartfiel
  • TE Script update
  • rework of the FSBLs
  • SI5338 CLKBuilder Pro Project
  • some additional Linux features
  • MAC from EEPROM
  • new assembly variants
  • remove special compiler flags, which was needed in 2018.2
2018-10-312018.2

TE0820-test_board_noprebuilt-vivado_2018.2-build_03_20181031164506.zip

TE0820-test_board-vivado_2018.2-build_03_20181031164452.zip

John Hartfiel
  • new assembly variants
  • update optional petalinux startup init script
2018-09-122018.2TE0820-test_board_noprebuilt-vivado_2018.2-build_03_20180912094615.zip
TE0820-test_board-vivado_2018.2-build_03_20180912094558.zip
John Hartfiel
  • correction:
    • TE0820-03-4EV-1EA has 2GB DDR, now 2GB instead of 1GB is initialised
    • small changes on DDR setup of TE0820-02-2EG-1EE
2018-08-152018.2TE0820-test_board-vivado_2018.2-build_01_20180706212937.zip
TE0820-test_board_noprebuilt-vivado_2018.2-build_01_20180706212952.zip
John Hartfiel
  • different design for REV03
  • small petalinux changes
  • IO renaming
  • additional notes for FSBL generated with Win SDK
  • changed *.bif
2018-06-192017.4TE0820-test_board-vivado_2017.4-build_10_20180619160713.zip
TE0820-test_board_noprebuilt-vivado_2017.4-build_10_20180619160728.zip
John Hartfiel
  • bugfix board part files BANK1 MIO voltages
  • Add "dummy" PS USB3 parameter so solve problems with some USB2 devices
2018-05-242017.4

TE0820-test_board-vivado_2017.4-build_10_20180524151356.zip
TE0820-test_board_noprebuilt-vivado_2017.4-build_10_20180524151342.zip

John Hartfiel
  • solved Linux Flash issue
  • new assembly variant
2018-04-252017.4TE0820-test_board-vivado_2017.4-build_07_20180425134435.zip
TE0820-test_board_noprebuilt-vivado_2017.4-build_07_20180425134459.zip
John Hartfiel
  • new assembly variants
2018-02-062017.4TE0820-test_board-vivado_2017.4-build_06_20180206203359.zip
TE0820-test_board_noprebuilt-vivado_2017.4-build_06_20180206203414.zip
John Hartfiel
  • solved JTAG/Linux issue
2018-02-012017.4TE0820-test_board-vivado_2017.4-build_05_20180201084319.zip
TE0820-test_board_noprebuilt-vivado_2017.4-build_05_20180201094724.zip
John Hartfiel
  • board part csv update
2018-01-242017.4TE0820-test_board-vivado_2017.4-build_05_20180124085247.zip
TE0820-test_board_noprebuilt-vivado_2017.4-build_05_20180124085303.zip
John Hartfiel
  • rework board part files
  • solved  USB, QSPI and PHy issue
2017-11-212017.2TE0820-test_board-vivado_2017.2-build_05_20171121160552.zip
TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171121160606.zip
John Hartfiel
  • solved SD SDX Cards Problem
  • Separate csv name for all assembly variants
2017-11-202017.2TE0820-test_board-vivado_2017.2-build_05_20171120162931.zip
TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171120162851.zip
John Hartfiel
  • solved SD WP Problem
2017-10-192017.2TE0820-test_board-vivado_2017.2-build_05_20171019104824.zip
TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171019104837.zip
John Hartfiel
  • initial release


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titleHardware Modules

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2AI21FA   2cg1i2BE21FL   2eg1e2.5 mm connectors    3AI210A   3cg1i0GB        3BE21FA   3eg4GB        3BE21FL   3eg1e2.5 mm connectors    
Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashEMMCOthersNotes
TE0820-ES1           es1            REV01     1GB      64MB      4GB        NA                     Not longer supported by vivado   
TE0820-02-02EG-1E    2eg_1e_1gb     REV02     1GB      64MB      4GB        NA                     NA                                 
TE0820-02-02EG-1E3   2eg_1e_1gb     REV02     1GB      64MB      4GB        2.5 mm connectors    NA                                 
TE0820-02-02CG-1E    2cg_1e_1gb     REV02     1GB      64MB      4GB        NA                     NA                                 
TE0820-02-03EG-1E    3eg_1e_1gb     REV02     1GB      64MB      4GB        NA                     NA                                 
TE0820-02-03EG-1E3   3eg_1e_1gb     REV02     1GB      64MB      4GB        2.5 mm connectors    NA                                 
TE0820-02-03CG-1E    3cg_1e_1gb     REV02     1GB      64MB      4GB        NA                     NA                                 
TE0820-02-02EG-1EA   2eg_1e_1gb     REV02     1GB      128MB     4GB        NA                     NA                                 
TE0820-02-02EG-1EL   2eg_1e_1gb     REV02     1GB      128MB     4GB        2.5 mm connectors    NA                                 
TE0820-02-02CG-1EA   2cg_1e_1gb     REV02     1GB      128MB     4GB        NA                     NA                                 
TE0820-02-03EG-1EA   3eg_1e_1gb     REV02     1GB      128MB     4GB        NA                     NA                                 
TE0820-02-03EG-1EL   3eg_1e_1gb     REV02     1GB      128MB     4GB        2.5 mm connectors    NA                                 
TE0820-02-03CG-1EA   3cg_1e_1gb     REV02     1GB      128MB     4GB        NA                     NA                                 
TE0820-02-04CG-1EA   4cg_1e_1gb     REV02     1GB      128MB     4GB        NA                     NA                                 
TE0820-03-04EV-1EA   4ev_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-02CG-1EA   2cg_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-02EG-1EA   2eg_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-02EG-1EL   2eg_1e_2gb     REV03     2GB      128MB     4GB        2.5 mm connectors    NA                                 
TE0820-03-03CG-1EA  1EA   3cg_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-04CG-1EA  1EA   4cg_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-03EG-1EA  1EA   3eg_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-03EG-1EL   3eg_1e_2gb     REV03     2GB      128MB     4GB        2.5 mm connectors    NA                                 
TE0820-03-2AI21FA   2cg_1i_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-2BE21FL   2eg_1e_2gb     REV03     2GB      128MB     8GB        2.5 mm connectors    NA                                 
TE0820-03-3AI210A   3cg_1i_2gb     REV03     2GB      128MB     0GB        NA                     NA                                 
TE0820-03-3BE21FA   3eg_1e_2gb     REV03     2GB      128MB     4GB        NA                     NA                                 
TE0820-03-3BE21FL   3eg_1e_2gb     REV03     2GB      128MB     4GB        2.5 mm connectors    NA                                 
TE0820-03-02CG-1ED   2cg_1e_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-2AE21FA    2cg_1e_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-2BE21FA    2eg3eg_1e_2gb     REV03     2GB      128MB     4GB        8GB        NA                     2.5 mm connectorsNA                                 
TE0820-03-3AE21FA    3cg_1e_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-3AI21FA    3cg_1i_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-4AE21FA    4cg_1e_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-4DE21FA    4ev_1e_2gb     REV03     2GB      128MB     8GB        NA                     NA                                 
TE0820-03-4DI21FA    4ev_1i_2gb     REV03     2GB      128MB     4GB        8GB        NA                     NA                                 


Design supports following carriers:

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For general structure and of the reference design, see Project Delivery - Xilinx devices

Design Sources

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TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
Vivado Project will be generated by TE Scripts
SDK/HSI<design name>/sw_libAdditional Software Template for SDK/HSI and apps_list.csv with settings for HSI
PetaLinux<design name>/os/petalinuxPetaLinux template with current configuration


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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter to start "Module Selection Guide"
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
    1. (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (bl31.elf, uboot.elf and image.ub) with exported HDF
    1. HDF is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
        Note: run init_config.sh before you start petalinux config. This will set correct temporary path variable.
  7. Add Linux files (bl31.elf, uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\default" or "prebuilt\os\petalinux\<short name>"
      Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\default"
  8. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects

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titleDocument change history.

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DateDocument RevisionAuthorsDescription

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd

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current-version
current-version
prefixv.

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modified-user
modified-user

  • new assembly variants
2019-08-09v.55John Hartfiel
  • bugfix fsbl
2019-06-19v.54John Hartfiel
  • design changes
  • new variants
2019-04-01v.53John Hartfiel
  • some notes
  • renamed ..D variants to ...A

2018-09-21

v.47John Hartfiel
  • 2018.3 release finished (include design reworks)

2018-10-31

v.43John Hartfiel
  • Update Design files for 2GB variants
  • rebuilt petalinux for optional init script

2018-09-12

v.41John Hartfiel
  • Update Design files for 2GB variants

2018-07-11

v.40John Hartfiel
  • add notes to ES1

2018-07-06

v.38John Hartfiel
  • 2018.2 release finished

2018-06-19

v.34John Hartfiel
  • Design Files Update

2018-02-13

v.29John Hartfiel
  • Design Files Update
2018-02-06v.27John Hartfiel
  • Design Files Update
2018-01-29v.26John Hartfiel
  • Update Known Issues
2018-01-24v.25John Hartfiel
  • Release 2017.4
2018-01-10v.24John Hartfiel
  • Update Known Issues
2017-12-20v.23John Hartfiel
  • Typo correction
  • Update HW Module Table Description
2017-11-21

v.19

John Hartfiel
  • Design Update
2017-11-20v.18John Hartfiel
  • Design Update
  • Add Variants with 128MB Flash
2017-11-13v.16John Hartfiel
  • Update Carrier sections
2017-11-06v.15John Hartfiel
  • Typo corrected
2017-10-23v.13John Hartfiel
  • Update Key Features section
  • Style Update Additional Software section
2017-10-19
v.9
John Hartfiel
  • Release 2017.2
2017-09-11v.1

Page info
created-user
created-user

Initial release

All

Page info
modified-users
modified-users



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