Page History
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ZynqMP PS Design with Linux Example and simple frequency counter to measure SI5338 Reference CLK with Vivado HW-Manager.
Key Features
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| Date | Vivado | Project Built | Authors | Description |
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| 2017-10-19 | 2017.2 | TE0820-test_board-vivado_2017.2-build_05_20171019104824.zip TE0820-test_board_noprebuilt-vivado_2017.2-build_05_20171019104837.zip | John Hartfiel | initial release |
Release Notes and Know Issues
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| Issues | Description | Workaround | To be fixed version |
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| USB2.0 | works only with USB3.0 enabled in Vivado Design | enable USB3.0 | --- |
| Boot Mode | for 4x5 carrier compatibility, currently 2 different CPLD Firmware files are available. | Reprogram your n |
Requirements
Software
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No additional software is needed.
Download ClockBuilder Desktop for SI5338
- Install and start ClockBuilder
- Select SI5338
- Options → Open register map file
Note: File location <design name>/misc/Si5338/RegisterMap.txt - Modify settings
- Options → save C code header files
- Replace Header files from FSBL template with generated file
Appx. A: Change History and Legal Notices
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| Date | Document Revision | Authors | Description | ||||||||||||||||||||||
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| Work in progressRelease 2017.2 | ||||||||||||||||||||||
| 2017-09-11 | v.1 |
| Initial release | ||||||||||||||||||||||
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Overview
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