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The configuration of the I/O's MIO13 - MIO77 are depending on the base-board peripherals connected to these pins.
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MGT Lanes
The B2B connectors J1 and J2 provide also access to the MGT banks of the Zynq UltraScale+ MPSoC. There are 8 high-speed data lanes (Xilinx GTH / GTR transceiver) available composed as differential signaling pairs for both directions (RX/TX).
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1) Bank 224 only available at ZU4CG or ZU4EV MPSoC.
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JTAG Interface
JTAG access is provided through the MPSoC's PS configuration bank 503 with bank voltage 'PS_1V8'.
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Overview
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