Page History
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- Xilinx ZYNQ UltraScale+ MPSoC, U1
- 2-Input AND Gate, U39
- Red LED (DONE), D1
- 256Mx16 DDR4-2400 SDRAM, U12
- 256Mx16 DDR4-2400 SDRAM, U9
- 256Mx16 DDR4-2400 SDRAM, U2
- 256Mx16 DDR4-2400 SDRAM, U3
- 12A PowerSoC DCDC converter, U4
- 1.5A LDO DCDC converter, U10
- 1.5A LDO DCDC converter, U8
- Voltage monitor circuit, U41
- 0.35A LDO DCDC converter, U26
- 0.35A LDO DCDC converter, U27
- Ultra fine 0.50 mm pitch, Razor Beam™ LP Slim Terminal Strip with 160 contacts, J3
- Ultra fine 0.50 mm pitch, Razor Beam™ LP Slim Terminal Strip with 160 contacts, J1
- Ultra fine 0.50 mm pitch, Razor Beam™ LP Slim Terminal Strip with 160 contacts, J4
- Ultra fine 0.50 mm pitch, Razor Beam™ LP Slim Terminal Strip with 160 contacts, J2
- 4-channel programmable PLL clock generator, U5
- Low-power programmable oscillator @ 25.000000 MHz, U5
- Low-power programmable oscillator @ 33.333333 MHz (PS_CLK), U32
- 256 Mbit serial NOR Flash memory, U7
- 256 Mbit serial NOR Flash memory, U17
| Page break |
|---|
Initial Delivery State
| Storage device name | Content | Notes |
|---|---|---|
SPI Flash main array | Not programmed | - |
eFUSE Security | Not programmed | - |
| Si5338A programmable PLL NVM OTP | Not programmed | - |
...
All dimensions are given in millimeters.
Revision History
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| Date | Revision | Contributors | Description | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Ali Naseri | current Current TRM release | |||||||||
| 2017-05-10 | v.1 | Ali Naseri | Initial document |
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