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The TE0803-01 SoM is equipped with with four DDR4-2400 SDRAM modules chips  with up to 8 GByte of memory. The SDRAM modules chips are connected to the Zynq MPSoC's PS DDR controller (bank 504) via 64-bit wide  data bus.

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 DateRevisionContributorsDescription

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infoTypeModified modified-datemodified- date
dateFormatyyyy-MM-dd
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infoTypeCurrent version
dateFormatyyyy-MM-dd
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  • typo correction in DDR section
2021-03-11v.40John Hartfiel
  • typo
  • fixed MGT Lanes RX/TX order
2019-07-15v.36John Hartfiel
  • correction SPLL section
2019-07-02v.35John Hartfiel
  • add eeprom section
  • update PCB Revision section
2019-06-19v.33John Hartfiel
  • update links
  • correction flash section

2018-08-20

v.29John Hartfiel
  • power section: add missing PS_1V8 output pin

2018-08-06

v.28John Hartfiel
  • typo correction
2017-11-13v.23Ali Naseri
  • updated B2B connector max. current rating per pin

2017-11-13

v.19



John Hartfiel
  • rework B2B section
2017-10-19

v.18

John Hartfiel
  • Removed ES1 Note
2017-08-15v.17Vitali Tsiukala
  • Changed Signals Count in the table B2B-connectors

2017-08-07


v.14

Jan Kumann
  • New smaller images.
  • New QSPI Flash MIO mapping table.
  • Temperature information changes.
  • Few corrections.

2017-05-17

V.4


Ali NaseriCurrent TRM release.
2017-05-10v.1Ali NaseriInitial document.

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