Page History

Custom_table_size_100

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Module: TRM Name always "TE Series Name" +TRM
Example: "TE0728 TRM"

Template Change history:

Version	Changes	Author
4.2	Changes Xilinx to AMD	ED
4.1	Minor changes Notes Tables	ED
4.0	Rework for smaller TRM which can be generated faster Reduce Signal Interfaces Pin Reduce On Board Periphery Reduce Power Move Configuration Signals from Overview to own section	JH
3.12	Version History changed from list to table all changed title-alignment for tables from left to center	ma
3.11	update "Recommended Operating Conditions" section
3.1	New general notes for temperature range to "Recommended Operating Conditions"
3.02	add again fix table of content with workaround to use it for pdf and wiki Export Link for key features examples Notes for different Types (with and without Main FPGA) Export Link for Signals, Interfaces and Pins examples Notes for different Types (Modul, Modul Hybrid, Evalboard, Carrier)
3.01	remove fix table of content and page layout ( split page layout make trouble with pdf export) changed and add note to signal and interfaces, to on board periphery section ...(not finished)
3.00	→ separation of Carrier/Module and evaluation kit TRM
2.15	add excerpt macro to key features
2.14	add fix table of content add table size as macro

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Important General Note:

If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable

Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)

Figure template:

Scroll Title

anchor	Figure_anchorname
title-alignment	center
title	Text

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Table template:
- Layout macro can be use for landscape of large tables

Scroll Title

anchor	Table_tablename
title-alignment	center
title	Text

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Example	Comment
1	2

The anchors of the Scroll Title should be named consistent across TRMs. A incomplete list of examples is given below
- <type>_<main section>_<name>
  - type: Figure, Table
  - main section:
    - "OV" for Overview
    - "SIP" for Signal Interfaces and Pins,
    - "OBP" for On board Peripherals,
    - "PWR" for Power and Power-On Sequence,
    - "B2B" for Board to Board Connector,
    - "TS" for Technical Specification
    - "VCP" for Variants Currently in Production
    - "RH" for Revision History
  - name: custom, some fix names, see below
- Fix names:
  - "Figure_OV_BD" for Block Diagram
  - "Figure_OV_MC" for Main Components
  - "Table_OV_IDS" for Initial Delivery State
  - "Table_PWR_PC" for Power Consumption
  - "Figure_PWR_PD" for Power Distribution
  - "Figure_PWR_PS" for Power Sequence
  - "Figure_PWR_PM" for Power Monitoring
  - "Table_PWR_PR" for Power Rails
  - "Table_PWR_BV" for Bank Voltages
  - "Table_TS_AMR" for Absolute_Maximum_Ratings
  - "Table_TS_ROC" for Recommended_Operating_Conditions
  - "Figure_TS_PD" for Physical_Dimensions
  - "Table_VCP_SO" for TE_Shop_Overview
  - "Table_RH_HRH" for Hardware_Revision_History
  - "Figure_RH_HRN" for Hardware_Revision_Number
  - "Table_RH_DCH" for Document_Change_History
Use Anchor in the document: add link macro and add "#<anchorname>
Refer to Anchor from external : <page url>#<pagename without space characters>-<anchorname>

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-----------------------------------------------------------------------

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Note for Download Link of the Scroll ignore macro:

Link to the base folder of the module (remove de/ or en/ from the URL):
Example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5_Carriers/TE0728/

Scroll Ignore
Download PDF version of this document.

Overview

The Trenz Electronic TEG2000 is an industrial-grade FPGA module integrating a CologneChip GateMate A1 FPGA, a 16 MByte QSPI Flash, level shifter, LEDs and several clocking and power components necessary for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips. All this on a tiny footprint, smaller than a credit card size at a very competitive price. All Trenz Electronic SoMs in 4 x 5 cm form factor are mechanically compatible.

Refer to http://trenz.org/tec0850-info for the current online version of this manual and other available documentation.

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Notes :

short description of the PCB
Short Link of the wiki resources reference:
- Use short link the Wiki Resource page, for example: http://trenz.org/te0728-info
- List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects

Key Features

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Note:
'description: Important components and connector or other Features of the module
→ please sort and indicate assembly options

→ See examples for different types <Series Name> TRM Template section examples#%3CSeriesName%3ETRMTemplatesectionexamples-KeyFeatures

Excerpt

SoC/FPGA/Module
- CologneChip GateMate A1 (CCGM1A1)
- performance mode: economy (VDD @ 1.0V)
- Temperature range: industrial (-20°C to 85°C)
RAM/Storage
- 16 MByte QSPI Flash, 64 MByte, HyperRAM - optional (default: not populated)
On Board
- 25 MHz Clock Oscillator
- LEDs (two status LEDs and one user LED)
- Level shifter
Interface
- Plug-on-Modul with 2 x 100-Pin Razor Beam B2B connector
- Configuration via Flash on board, USB or JTAG
- 5 Gb/s SerDes interface
- Diverse I/O- and LVDS configurations:
  - 5 banks (SA,EB,WC,EA,WB) with 18 I/Os or 9 LVDS pairs each
  - 1 bank (NB) with 12 I/Os or 6 LVDS pairs
  - 1 bank (NA) with 14 I/Os or 6 LVDS pairs
  - 1 bank (SB) with 6 I/Os @ 1.8V and 8 I/Os level shifted @ 3.3V
Power
- Supply voltages: either 3.3V or 3.3V and 5V
- On-board high-efficiency DC-DC converters
  - 3 A x 1.0 V power rail
  - 3 A x 1.8 V power rail
  - 4 A x 3.3 V power rail
Dimension
- 4 x 5 cm
Notes
- Other assembly options for cost or performance optimization plus high volume prices available on request.

Block Diagram

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add drawIO object in Scroll Ignore section and add reference image in Scroll Only.

Note
For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .

Note

Title (not anchor) of all Scroll Title such as DrawIOs and Tables should be changed according to the Module name.

Example: TE0812 Block Diagram

Note

All created DrawIOs should be named according to the Module name:

Example: DrawIO of TE0812 Block Diagram should be named TE0812_OV_BD

Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Image Added

Scroll Title

anchor	Figure_OV_BD
title-alignment	center
title	TExxxx block diagram

Scroll Ignore

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Main Components

details

Notes :
Picture of the PCB (top and bottom side) with labels of important components
Add List below
hidden true
id Comments
Note
For more information regarding how to add board photos, Please refer to "Diagram Drawing Guidline" .
Scroll Title
anchor Figure_OV_MC
title-alignment center
title TExxxx main components
Scroll IgnoreCreate DrawIO object here: Attention if you copy from other page, objects are only linked.
TExxxx main components

draw.io Diagram
border true
diagramName TEG2000_TRM_MainComp
simpleViewer false
width
links auto
tbstyle top
lbox true
diagramWidth 642
revision 1
Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

CologneChip GateMate A1 (CCGM1A1), U1
16MByte Quad SPI Flash memory, U5
DC-DC Power switch 3.3V max. 4A
DC-DC Power switch 1.0V
DC-DC Power switch 1.8V
Power Monitor for 1.8V and 3.3V
100MHz Crystal Oscillator SiT9120
LEDs (two red status LEDs and one green user LED)

Initial Delivery State

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Note

Only components like EEPROM, QSPI flash can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

Scroll Title

anchor	Table_OV_IDS
title-alignment	center
title	Initial delivery state of programmable devices on the module

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Storage device name	Content	Notes
Quad SPI Flash
EEPROM
System Controller CPLD
DDR4 SDRAM
eMMC
Programmable Clock Generator

Signals, Interfaces and Pins

Page properties

hidden	true
id	Comments

For subsection examples see: <Series Name> TRM Template section examples#%3CSeriesName%3ETRMTemplatesectionexamples-Signals,InterfacesandPins

Note
Table with all connectors and Designator List of different interfaces per connector IO CNT (for FPGA IOs where functionality can be changed by customer)

Connectors

Scroll Title

anchor	Table_SIP_C
title-alignment	center
title	Board Connectors

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Connector Type	Designator	Interface	IO CNT	Notes

Test Points

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you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delete the Test Point section.

Example:

Test Point	Signal	Notes¹⁾
TP1	PWR_PL_OK

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

Scroll Title

anchor	Table_SIP_TPs
title-alignment	center
title	Test Points Information

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Test Point	Signal	Notes¹⁾
TP1

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

On-board Peripherals

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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection by assigning advance link using: #NameOfTheSection

Example:

Chip/Interface	Designator	Connected To	Notes
ETH PHY	U10	B2B connector J1 SoC MIO	Gigabit ETH PHY

Scroll Title

anchor	Table_OBP
title-alignment	center
title	On board peripherals

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Chip/Interface	Designator	Connected To	Notes

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hidden	true
id	Comments

For example subsections see: <Series Name> TRM Template section examples#%3CSeriesName%3ETRMTemplatesectionexamples-On-boardPeripherals

Configuration and System Control Signals

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hidden	true
id	Comments

Overview all Controller signals, like Reset, Boote Mode, JTAG Interface(Connector or USB In case of FTDI)...
In case it's connected to CPLD always link to CPLD description and add not from the current implementation here(in case it's available)

Scroll Title

anchor	Table_OV_CNTRL
title-alignment	center
title	Controller signal.

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Connector+Pin	Signal Name	Direction¹⁾	Description

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

Power and Power-On Sequence

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id	Comments

Enter the default value for power supply and startup of the module here.

Order of power provided Voltages and Reset/Enable signals

Link to Schematics, for power images or more details

Power Rails

Page properties

hidden	true
id	Comments

List of all power rails which are accessible by the customer

Main Power Rails and Variable Bank Power

Scroll Title

anchor	Table_PWR_PR
title-alignment	center
title	Module power rails.

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Power Rail Name/ Schematic Name	Connector + Pin	Direction¹⁾	Notes

¹⁾ Direction:

- IN: Input from the point of view of this board.
- OUT: Output from the point of view of this board.

Recommended Power up Sequencing

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hidden	true
id	Comments

List baseboard design hints for final baseboard development.

Scroll Title

anchor	Table_BB_DH
title-alignment	center
title	Baseboard Design Hints

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Sequence	Net name	Recommended Voltage Range	Pull-up/down	Description	Notes

Board to Board Connectors

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id	Comments

This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series,
For example: 6 x 6 SoM LSHM B2B Connectors
Include Page
PD:6 x 6 SoM LSHM B2B Connectors
PD:6 x 6 SoM LSHM B2B Connectors

Technical Specifications

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id	Comments

List of all power rails which are accessible by the customer

Main Power Rails and Variable Bank Power add boarder one time maximum Rating (Board will damaged)

Absolute Maximum Ratings ^*)

Scroll Title

anchor	Table_TS_AMR
title-alignment	center
title	Absolute maximum ratings

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Power Rail Name/ Schematic Name	Description	Min	Max	Unit
				V
				V
				V
				V
				V
				V
				V
				V
				°C

^*) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these
or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions

This TRM is generic for all variants. Temperature range can be differ depending on the assembly version. Voltage range is mostly the same during variants (exceptions are possible, depending on custom request)

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Variants of modules are described here: Article Number Information
Modules with commercial temperature grade are equipped with components that cover at least the range of 0°C to 75°C
Modules with extended temperature grade are equipped with components that cover at least the range of 0°C to 85°C
Modules with industrial temperature grade are equipped with components that cover at least the range of -40°C to 85°C
The actual operating temperature range will depend on the FPGA / SoC design / usage and cooling and other variables.

Scroll Title

anchor	Table_TS_ROC
title-alignment	center
title	Recommended operating conditions.

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Parameter	Min	Max	Units	Reference Document
			V	See ???? datasheet.
			V	See ???? datasheet.
			V	See ???? datasheet.
			V	See ???? datasheet.
			V	See ???? datasheet.
			V	See ???? datasheet.
			V	See ???? datasheet.
			°C	See ???? datasheet.

Physical Dimensions

Module size: ?? mm × ?? mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: ? mm.

PCB thickness: ?? mm.

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id	Comments

In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.

For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:

https://www.trenz-electronic.de/fileadmin/docs/Trenz_Electronic/Modules_and_Module_Carriers/5.2x7.6/TE0745/REV02/Documents/AD-TE0745-02-30-1I.PDF

Note
For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guideline" .

Scroll Title

anchor	Figure_TS_PD
title-alignment	center
title	Physical Dimension

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only

scroll-pdf	true
scroll-office	true
scroll-chm	true
scroll-docbook	true
scroll-eclipsehelp	true
scroll-epub	true
scroll-html	true

image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Currently Offered Variants

Page properties

hidden	true
id	Comments

Set correct link to the shop page overview table of the product on English and German.

Example for TE0706:

ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TE0706

DEU Page: https://shop.trenz-electronic.de/de/search?sSearch=TE0706

Scroll Title

anchor	Table_VCP_SO
title-alignment	center
title	Trenz Electronic Shop Overview

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Trenz shop TEXXXX overview page
English page	German page

Revision History

Hardware Revision History

Page properties

hidden	true
id	Comments

Set correct links to download Carrier, e.g. TE0706 REV02:

TE0706-02 -> https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents

Note:

Date format: YYYY-MM-DD
Example:
Date Revision Changes Documentation Link
2020-11-25 REV02
Resistors R14 and R15 was replaced by 953R (was 5K1)
Resistor R5 was replaced by 5K1, R8 by 953R (was 9K09 and 1K69 respectively)
REV02

Scroll Title

anchor	Figure_RV_HRN
title-alignment	center
title	Board hardware revision number.

Scroll Ignore
Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only
image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Scroll Title

anchor	Table_RH_HRH
title-alignment	center
title	Hardware Revision History

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Date	Revision	Changes	Documentation Link

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

Page properties

hidden	true
id	Comments

Note this list must be only updated, if the document is online on public doc!
It's semi automatically, so do following
- Add new row below first
- Copy "Page Information Macro (date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template
- Metadata is only used of compatibility of older exports

Scroll Title

anchor	Table_RH_DCH
title-alignment	center
title	Document change history.

Scroll Table Layout

orientation	portrait
sortDirection	ASC
repeatTableHeaders	default
style
widths
sortByColumn	1
sortEnabled	false
cellHighlighting	true

Date

Revision

Contributor

Description

Page info

infoType	Modified date
dateFormat	yyyy-MM-dd
type	Flat

Page info

infoType	Current version
prefix	v.
type	Flat
showVersions	false

Page info

infoType	Modified by
type	Flat
showVersions	false

<add TRM change list here>

--

all

Page info

infoType	Modified users
type	Flat
showVersions	false

--

Disclaimer

Include Page

	IN:Legal Notices
	IN:Legal Notices

Scroll Only

HTML
<style> .wiki-content .columnLayout .cell.aside { width: 0%; }</style>

Scroll pdf ignore

Custom_fix_page_content

Trenz Electronic Documentation

Versions Compared

Old Version 4

New Version 5

Key

Overview

Key Features

Block Diagram

Main Components

Initial Delivery State

Signals, Interfaces and Pins

Connectors

Test Points

On-board Peripherals

Configuration and System Control Signals

Power and Power-On Sequence

Power Rails

Recommended Power up Sequencing

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings ^*)

Recommended Operating Conditions

Physical Dimensions

Currently Offered Variants

Revision History

Hardware Revision History

Document Change History

Disclaimer

Table of contents

Trenz Electronic Documentation

Page History

Versions Compared

Old Version 4

New Version 5

Key

Overview

Key Features

Block Diagram

Main Components

Initial Delivery State

Signals, Interfaces and Pins

Connectors

Test Points

On-board Peripherals

Configuration and System Control Signals

Power and Power-On Sequence

Power Rails

Recommended Power up Sequencing

Board to Board Connectors

Technical Specifications

Absolute Maximum Ratings *)

Recommended Operating Conditions

Physical Dimensions

Currently Offered Variants

Revision History

Hardware Revision History

Document Change History

Disclaimer

Table of contents

Absolute Maximum Ratings ^*)