| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| B2B Connector | Interface | Number of I/O | Notes |
|---|
JB1
| RJ45, J1B-J1C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | | RJ45, J1A | 4 Differential pair, 8 Single Ended | PHY1 MDIO | | RJ45, J2B-J2C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | | RJ45, J2A | 4 Differential pair, 8 Single Ended | PHY2 MDIO | | TE0790 Base, J8 | 4 Single Ended |
| | TE0790 Base, J7 | 1 Single Ended |
| | USB A Stacked, U7 | 2 Single Ended | USB | | Power Switch, U1 | 2 Single Ended |
| | SMD Line Filter, L6 | 1 Differential pair, 2 Single Ended | USB1_D | | SMD Line Filter, L7 | 1 Differential pair, 2 Single Ended | USB2_D | | ESD protection diode, U5 | 1 Single Ended | USB1_VBUS | | ESD protection diode, U8 | 1 Single Ended | USB2_VBUS | JB2
| Module TE078x FPGA, Bank 111-112 | 16 Differential pair, 32 Single Ended | MGT_RX8...15, MGT_TX8...15 | | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B34_VRP, J1_B34_VRN | | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B33_VRP, J1_B33_VRN | JB3
| TE0790 Base, J8 | 4 Single Ended | M_TCK, M_TMS, M_TDO, M_TDI | | TE0790 Base, J7 | 4 Single Ended 2 Single Ended 1 Single Ended | TCK, TMS, TDO, TDI UART RX/TX RESIN | | DIP Switch, S1-A | 1 Single Ended | JTAGENB | | SMA Coaxial, J3...6 | 2 Differential pair, 4 Single Ended | MGT_RX0, MGT_TX0 | | Module TE0782...4 FPGA, Bank 109-110 | 16 Differential pair, 32 Single Ended | MGT_RX1...7, MGT_TX0...7 |
|