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Scroll Title |
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anchor | Table_SIP_B2B |
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title | General I/O to B2B connectors information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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B2B Connector | Interface | Number of I/O | Notes |
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JB1
| RJ45, J1B-J1C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | RJ45, J1A | 4 Differential pair, 8 Single Ended | PHY1 MDIO | RJ45, J2B-J2C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | RJ45, J2A | 4 Differential pair, 8 Single Ended | PHY2 MDIO | TE0790 Base, J8 | 4 Single Ended |
| TE0790 Base, J7 | 1 Single Ended |
| USB A Stacked, U7 | 2 Single Ended | USB | Power Switch, U1 | 2 Single Ended |
| SMD Line Filter, L6 | 1 Differential pair, 2 Single Ended | USB1_D | SMD Line Filter, L7 | 1 Differential pair, 2 Single Ended | USB2_D | ESD protection diode, U5 | 1 Single Ended | USB1_VBUS | ESD protection diode, U8 | 1 Single Ended | USB2_VBUS | JB2
| Module TE078x FPGA, Bank 111-112 | 16 Differential pair, 32 Single Ended | MGT_RX8...15, MGT_TX8...15 | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B34_VRP, J1_B34_VRN | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B33_VRP, J1_B33_VRN | JB3
| TE0790 Base, J8 | 4 Single Ended | M_TCK, M_TMS, M_TDO, M_TDI | TE0790 Base, J7 | 4 Single Ended 2 Single Ended 1 Single Ended | TCK, TMS, TDO, TDI UART RX/TX RESIN | DIP Switch, S1-A | 1 Single Ended | JTAGENB | SMA Coaxial, J3...6 | 2 Differential pair, 4 Single Ended | MGT_RX0, MGT_TX0 | Module TE0782...4 FPGA, Bank 109-110 | 16 Differential pair, 32 Single Ended | MGT_RX1...7, MGT_TX0...7 |
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JTAGs access to the TE078x SoM are available through B2B connector JB3.
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Scroll Title |
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anchor | Table_SIP_TestPoint |
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title | Test Points Information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Test Point | Signals | B2B Connector | Notes |
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1 | VBAT_I | JB3-124 |
| 2 | OTG2_ID | JB1-22 |
| 3 | OTG1_ID | JB1-34 |
| 4 | USB1_VBUS | JB1-36 |
| 5 | USB2_VBUS | JB1-24 |
| 6 | M_TCK | JB3-81 |
| 7 | M_TDO | JB3-88 |
| 8 | M_TDI | JB3-87 |
| 9 | M_TMS | JB3-82 |
| 10 | TCK | JB3-141 |
| 11 | TDO | JB3-148 |
| 12 | TDI | JB3-147 |
| 13 | TMS | JB3-142 |
| 14 | VIN | JB1-165...168 |
| 15 | 5V | - |
| 16 | 3.3V_CPLD | JB1-147...148 |
| 17-18 | GND | - |
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On-board Peripherals
Page properties |
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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