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Modul main Reset is possible over button S1 on J7 TE0790 XMOD.
| Scroll Title |
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| anchor | Table_OV_RST |
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| title | Reset process. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
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|
Signal | B2B | Note |
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RESIN | JBC3-130 | Board Reset |
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| Scroll Title |
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| anchor | Table_SIP_B2B |
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| title | General I/O to B2B connectors information |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| B2B Connector | Interface | Number of I/O | Notes |
|---|
JB1
| RJ45, J1B-J1C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | | RJ45, J1A | 4 Differential pair, 8 Single Ended | PHY1 MDIO | | RJ45, J2B-J2C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | | RJ45, J2A | 4 Differential pair, 8 Single Ended | PHY2 MDIO | | TE0790 Base, J8 | 4 Single Ended |
| | TE0790 Base, J7 | 1 Single Ended |
| | USB A Stacked, U7 | 2 Single Ended | USB | | Power Switch, U1 | 2 Single Ended |
| | SMD Line Filter, L6 | 1 Differential pair, 2 Single Ended | USB1_D | | SMD Line Filter, L7 | 1 Differential pair, 2 Single Ended | USB2_D | | ESD protection diode, U5 | 1 Single Ended | USB1_VBUS | | ESD protection diode, U8 | 1 Single Ended | USB2_VBUS | JB2
| Module TE078x FPGA, Bank 111-112 | 16 Differential pair, 32 Single Ended | MGT_RX8...15, MGT_TX8...15 | | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B34_VRP, J1_B34_VRN | | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B33_VRP, J1_B33_VRN | JB3
| TE0790 Base, J8 | 4 Single Ended | M_TCK, M_TMS, M_TDO, M_TDI | | TE0790 Base, J7 | 4 Single Ended 2 Single Ended 1 Single Ended | TCK, TMS, TDO, TDI UART RX/TX RESIN | | DIP Switch, S1-A | 1 Single Ended | JTAGENB | | SMA Coaxial, J3...6 | 2 Differential pair, 4 Single Ended | MGT_RX0, MGT_TX0 | | Module TE0782...4 FPGA, Bank 109-110 | 16 Differential pair, 32 Single Ended | MGT_RX1...7, MGT_TX0...7 |
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JTAG Interfaces
JTAG access to the TE078x SoM is available through B2B connector JB3. JTAG access is provided by TE0790 XMOD Adapter on Pin Header J7.
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| Scroll Title |
|---|
| anchor | Table_SIP_CPLDJTG |
|---|
| title | CPLD JTAG pins connection |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
JTAG Interface Pins | Signal Name | B2B Connector | Notes |
|---|
| A | CPLD_GPIO0 | JB1A-10 |
| | B | CPLD_GPIO1 | JB1A-12 |
| | C | M_TCK | JB3B-81 |
| | D | M_TDO | JB3B-88 |
| | E | CPLD_GPIO2 | JB1A-14 |
| | F | M_TDI | JB3B-87 |
| | G | CPLD_GPIO3 | JB1A-16 |
| | H | M_TMS | JB3B-82 |
| | 3.3V | 3.3V_CPLD | JB1- JB3 |
| | VIO | 3.3V_CPLD | JB1- JB3 |
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DIP Switch S2 on TE0790 must be set like the following table.
| Scroll Title |
|---|
| anchor | Table_SIP_JTG_DIP |
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| title | XMOD DIP Switch Setting |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
DIP Switch | Setting | Notes |
|---|
| S2-1 | ON |
| | S2-2 | OFF |
| | S2-3 | OFF |
| | S2-4 | OFF |
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RJ45 Connectors
| Scroll Title |
|---|
| anchor | Table_SIP_RJ45 |
|---|
| title | RJ45s Connections to B2B Connectors |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Signal Name | RJ45-J1 Pin | RJ45-J2 Pin | Notes |
|---|
| B2B |
|---|
| PHY_MDI0_P | JB1A-23 | JB1A-39 |
| | PHY_MDI0_N | JB1A-21 | JB1A-37 |
| | PHY_MDI1_P | JB1A-19 | JB1A-35 |
| | PHY_MDI1_N | JB1A-17 | JB1A-33 |
| | PHY_MDI2_P | JB1A-15 | JB1A-31 |
| | PHY_MDI2_N | JB1A-13 | JB1A-29 |
| | PHY_MDI3_P | JB1A-11 | JB1A-27 |
| | PHY_MDI3_N | JB1A-9 | JB1A-25 |
| | J2_TX9_P | JB1A-95 | - | LED Green/Yellow | | J2_TX9_N | JB1A-97 | - | LED Green/Yellow | | J2_RX9_N | - | JB1A-96 | LED Green/Yellow | | J2_RX9_P | - | JB1A-98 | LED Green/Yellow |
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| Scroll Title |
|---|
| anchor | Table_RH_HRH |
|---|
| title | Hardware Revision History |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Date | Revision | Changes | Documentation Link |
|---|
| 2016-11-05 | 01- | Initial Release | REV01 |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
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