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| Scroll Title |
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| anchor | Table_SIP_B2B |
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| title | General PL I/O to B2B connectors information |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| B2B Connector | Interface | Number of I/O | Notes |
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JBC1
| RJ45, J1B-J1C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | | RJ45, J1A | 4 Differential pair, 8 Single Ended |
| | RJ45, J2B-J2C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | | RJ45, J2A | 4 Differential pair, 8 Single Ended |
| | TE0790 Base, J8 | 4 Single Ended |
| | TE0790 Base, J7 | 1 Single Ended |
| | USB A Stacked, U7 | 2 Single Ended |
| | Power Switch, U1 | 2 Single Ended |
| | SMD Line Filter, L6 | 1 Differential pair, 2 Single Ended |
| | SMD Line Filter, L7 | 1 Differential pair, 2 Single Ended |
| JBC2
| Module TE0782...4 FPGA, Bank 111-112 | 16 Differential pair, 32 Single Ended | MGT_RX8...15, MGT_TX8...15 | | Module TE0782...4 FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B34_VRP, J1_B34_VRN | | Module TE0782...4 FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B33_VRP, J1_B33_VRN | | JBC3 | TE0790 Base, J8 | 4 Single Ended | M_TCK, M_TMS, M_TDO, M_TDI |
| TE0790 Base, J7 | 4 Single Ended 2 Single Ended 1 Single Ended | TCK, TMS, TDO, TDI UART RX/TX RESIN |
| DIP Switch, S1-A | 1 Single Ended | JTAGENB |
| Module TE0782...4 FPGA, Bank 109-110 | 16 Differential pair, 32 Single Ended | MGT_RX0...7, MGT_TX0...7 |
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JTAG Interface
JTAG access to the TExxxx SoM TE0782...4 SoMs through B2B connector JMX.
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