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Table 1: TE0724-01 main components.
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The GPIOs of the 10 Pmods (J10 to J17, J20, J21) are connected with 100 Ohm differential routing to the B2B connector. J21 is a pure I2C I2C compatible Pmod, without additional signals. The other 9 are GPIO Pmods where despite J20 all others can be used as dual Pmods. By default VCCIO_35 is connected with a 0 Ohm resistor to 3.3V. De-soldering this resistor and using pinheader not fitted pin header J19 instead, the variable bank power VCCIO_35 for the Pmods J10, J11, J12, J13, J14, J16 can be selected.
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The power-on sequence is solely controlled by the attached module. Optional sequenzing signals for integration of additional hardware are PWR_GPIO2 and PWR_GPIO4. If the attached module uses the adjustable bank power VCCIO_35, this has to be powered up after the modules SOCs powerrails are up and before any other signal is applied to the bank IOs. The 1.8V and 3.3V power rails are used for the SD Card level shifter U13. The Datasheet datasheet states to first power up 1.8V and then 3.3V, this has to be taken into account when reconfiguring the power circuit of the attached SoM.
Power Rail Name | B2B J1 Pins | Direction on B2B | Notes |
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VIN | 154, 156, 158, 160 | Output | External main supply voltage. |
3.3V | 43, 74 | Input | |
1.8V | 63 | Input | |
VCCIO_35 | 54 | Output | |
VLDO1 | 83 | Input | |
VLDO2 | 94 | Input | Used to enable UART level shifter. Therefore fix at 1.8V. |
VLDO34 | 53 | Input | |
VBAT | 152 | Input/Output | Reserved for PMIC backup battery and charger. |
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