Page History
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Key Features
Xilinx Artix-7 (A15T, A35T, A50T)
- Rugged for shock and high vibration
- 16 MByte QSPI Flash memory
- Differential MEMS Oscillator for GT Clocking
- MEMS Oscillator for PL Clocks (option)
- Plug-on module with 2 × 100-pin high-speed hermaphroditic strips
- 144 FPGA I/O's (max 68 differential)
- XADC Analog Input
- 4 GTP (high-performance transceiver) lanes
- GT Reference Clock input
- Optimized I/O and power pins for good signal integrity
- On-board high-efficiency DC-DC converters
- eFUSE bit-stream encryption (AES)
- One user LED
Assembly options for cost or performance optimization available upon request. Possible options:
- FPGA Type (A15T, A35T, A50T), temperature grade
- GT Clock Frequency (or none if not assembled)
- PL Clock Frequency and precision or none if not assembled)
- Config and B14 Bank Voltage: 1.8V or 3.3V
- SPI Flash type (or none if not assembled)
- LED Color (or none if not assembled)
- PUDC Pin strapping (pull high or pull down)
- GT Power Enable pin strapping (default power enabled or disabled)
Current Assembly Variants
Variant | FPGA | GT Clock | PL Clock | PUDC | GT PWR Enable | B14/Config Voltage | SPI Flash | LED |
---|---|---|---|---|---|---|---|---|
StandardTE0714-02-35-2I | A35T-2I | 125MHz | 25Mhz | High | Enabled | 3.3V | S25FL127S | Red |
TE0714-02-35-2IC6 | A35T-2I | 125MHz | 25MHz | High | Enabled | 1.8V | N25Q128 | Red |
TE0714-02-50-2I | A50T-2I | 125MHz | 25Mhz | High | Enabled | 3.3V | S25FL127S | Red |
TE0714-02-50-2IC6 | A50T-2I | 125MHz | 25MHz | High | Enabled | 1.8V | N25Q128 | Red |
Signals, Interfaces and Pins
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Disclaimer
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