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MGT (Multi Gigabit Transceiver) lane consists of one transmit and one receive (TX/RX) differential pairs, two signals each or four signals total per one MGT lane. Following table lists lane number, MGT bank number, transceiver type, signal schematic name, board-to-board pin connection and FPGA pins connection:
Lane | Bank | Type | Signal Name | B2B Pin | FPGA Pin |
---|
0 | 225 | GTH | - MGT_RX0_P
- MGT_RX0_N
- MGT_TX0_P
- MGT_TX0_N
|
J3J3J3J3 | - MGTHRXP0_225, Y2
- MGTHRXN0_225, Y1
- MGTHTXP0_225, AA4
- MGTHTXN0_225, AA3
|
1 | 225 | GTH | - MGT_RX1_P
- MGT_RX1_N
- MGT_TX1_P
- MGT_TX1_N
|
J3J3J3J3 | - MGTHRXP1_225, V2
- MGTHRXN1_225, V1
- MGTHTXP1_225, W4
- MGTHTXN1_225, W3
|
2 | 225 | GTH | - MGT_RX2_P
- MGT_RX2_N
- MGT_TX2_P
- MGT_TX2_N
|
J3J3J3J3 | - MGTHRXP2_225, T2
- MGTHRXN2_225, T1
- MGTHTXP2_225, U4
- MGTHTXN2_225, U3
|
3 | 225 | GTH | - MGT_RX3_P
- MGT_RX3_N
- MGT_TX3_P
- MGT_TX3_N
|
J3J3J3J3 | - MGTHRXP3_225, P2
- MGTHRXN3_225, P1
- MGTHTXP3_225, R4
- MGTHTXN3_225, R3
|
4 | 224 | GTH | - MGT_RX4_P
- MGT_RX4_N
- MGT_TX4_P
- MGT_TX4_N
|
J1J1J1J1 | - MGTHRXP0_224, AH2
- MGTHRXN0_224, AH1
- MGTHTXP0_224, AG4
- MGTHTXN0_224, AG3
|
5 | 224 | GTH | - MGT_RX5_P
- MGT_RX5_N
- MGT_TX5_P
- MGT_TX5_N
|
J1J1J1J1 | - MGTHRXP1_224, AF2
- MGTHRXN1_224, AF1
- MGTHTXP1_224, AF6
- MGTHTXN1_224, AF5
|
6 | 224 | GTH | - MGT_RX6_P
- MGT_RX6_N
- MGT_TX6_P
- MGT_TX6_N
|
J1J1J1J1 | - MGTHRXP2_224, AD2
- MGTHRXN2_224, AD1
- MGTHTXP2_224, AE4
- MGTHTXN2_224, AE3
|
7 | 224 | GTH | - MGT_RX7_P
- MGT_RX7_N
- MGT_TX7_P
- MGT_TX7_N
|
J3J3J3J3 | - MGTHRXP3_224, AB2
- MGTHRXN3_224, AB1
- MGTHTXP3_224, AC4
- MGTHTXN3_224, AC3
|
Table 3: MGT lanes
Below is are listed MGT banks reference clock sources. Note that clocks consists of...
Clock Signal | 224CLK2 | | 224 | MGT_CLK3 | | |
225 | MGT_CLK0 | | |
225 | MGT_CLK1 | | 225 | B2B, JM3-33 | MGTREFCLK0P_225, Y6 | Supplied by the carrier-board. |
MGT_CLK0_N | 225 | B2B, JM3-31 | MGTREFCLK0N_225, Y5 | Supplied by the carrier-board. |
MGT_CLK1_P | 225 | U2, CLK1B | MGTREFCLK1P_225, V6 | On-board Si5338A. |
MGT_CLK1_N | 225 | U2, CLK1A | MGTREFCLK1N_225, V5 | On-board Si5338A. |
MGT_CLK2_P | 224 | B2B, JM3-34 | MGTREFCLK2P_224, AD6 | Supplied by the carrier-board. |
MGT_CLK2_N | 224 | B2B, JM3-32 | MGTREFCLK2N_224, AD5 | Supplied by the carrier-board. |
MGT_CLK3_P | 224 | U2, CLK2B | MGTREFCLK3P_224, AB6 | On-board Si5338A. |
MGT_CLK3_N | 224 | U2, CLK2B | MGTREFCLK3N_224AB5 | On-board Si5338A. |
Table 4: MGT reference clock sources.
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