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Clock Signal Schematic Name
FMC Connector PinsDirectionClock SourceNotes
B228_CLK0J5-D4 / J5-D5inFMC Connector J5clock signal to MGT bank 228
B229_CLK0J5-B20 / J5-B21inFMC Connector J5clock signal to MGT bank 229
FMCCLK2J5-K4 / J5-K5outCarrier Board PLL SI5338A U35, CLK2-
FMCCLK3J5-J2 / J5-J3outCarrier Board PLL SI5338A U35, CLK3-
B64_L14_P / B64_L14_NJ5-H4 / J5-H5inFMC Connector J5bank 64 clock capable pinLVDS-pair
B48_L6_P / B48_L6_NJ5-G2 / J5-G3inFMC Connector J5bank 48 clock capable pinLVDS-pair

Table 4: FMC connector pin-outs for reference clock output

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The carrier board VCCO voltage 'FMC_VADJ' supplying the PL IO-banks of the SoM MPSoC (bank 64, 65, 66, 48) is provided by DC-DC converter U8 and selectable by the pins 'FMC_VID0' ... 'FMC_VID2' of the System Controller CPLD U17.

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Absolute Maximum Ratings

Parameter

MinMax

Unit

Notes / Reference Document

     
     
     
Power supply voltage (12V nominal)11.412.6VANSI/VITA 57.1 FPGA Mezzanine Card (FMC) standard
Battery Voltage PSBATT-0.52VXilinx DS925 data sheet
Voltage on pins PMOD P1-0.53.75VMachXO2 Family Data Sheet     

Storage temperature (ambient)

-55

85

°C

Marvell 88E1512 datasheet

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Recommended Operating Conditions

 
ParameterMinMaxUnitNotes / Reference Document
     
     
    
Power supply voltage (12V nominal)11.412.6VANSI/VITA 57.1 FPGA Mezzanine Card (FMC) standard
Battery Voltage PSBATT1.21.5VXilinx DS925 data sheet
Voltage on pins PMOD P13.1353.6VMachXO2 Family Data Sheet
Note
Please check TRM TE0808 and Xilinx datasheet DS925 for complete list of absolute maximum and recommended operating ratings for the mounted TE0808 SoM.

Operating Temperature Ranges

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Second ES production release
 DateRevision

Notes

Link to PCNDocumentation Link
-04First production silicon---
-03--TEBF0808-03
-02First ES production release--TEBF0808-02
-01Prototypes---

Hardware revision number is written on the PCB board together with the module model number separated by the dash.

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