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BankType

B2B

Connector

I/O Signal

Count

VoltageNotes

64

HP

JM2

48

User

Max voltage 1.8V.

64

HP

JM2

2

User

Max voltage 1.8V.
65

HP

JM2

18

User

Max voltage 1.8V.

65

HP

JM3

16

User

Max voltage 1.8V.

66

HP

JM1

48

User

Max voltage 1.8V.

501

MIO

JM1

6

13.8V3V

-

505

GTR

JM3

4 lanes

N/A

-

505

GTR CLK

JM3

1 differential input

N/A

-

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Variants Currently In Production

Module Variant

MPSoC

RAMSPI FlashTemperature RangeNote
TE0820-02-02CG-1EXCZU2CG-1SFVC784E1 GByte DDR464 MByteExtended 
TE0820-02-03CG-1EXCZU3CG-1SFVC784E1 GByte DDR464 MByteExtended 
TE0820-02-02EG-1EXCZU2EG-1SFVC784E1 GByte DDR464 MByteExtended 
TE0820-02-03EG-1EXCZU3EG-1SFVC784E1 GByte DDR464 MByteExtended 
TE0820-02-02EG-1E3XCZU2EG-1SFVC784E1 GByte DDR464 MByteExtended2,5mm Samtec connector
TE0820-02-03EG-1E3XCZU3EG-1SFVC784E1 GByte DDR464 MByteExtended2,5mm Samtec connector

Table 17: TE0820-02 variants.

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Date

Revision

Contributors

Description

Page info
modified-date
modified-date
dateFormatyyyy-MM-dd

John Hartfiel
  • Correction in the "Board to Board (B2B) I/Os" section
  • Update in the "Variants Currently In Production" section
2017-09-18v.49John Hartfiel
  • Update PS MIO table
2017-08-30v.46Jan Kumann
  • MGT lanes section added.

2017-08-24

v.36

John Hartfiel
  • Correction in the  "Key Features" section.
2017-08-21v.34John Hartfiel
  • "Initial delivery state" section updated.
2017-08-21v.33Jan Kumann
  • HW revision 02 block diagram added.
  • Power distribution and power-on sequence diagram added.
  • System Controller CPLD and DDR4 SDRAM sections added.
  • TRM update to the template revision 1.6
  • Weight section removed.
  • Few minor corrections.

 

2017-08-18

v.7

John Hartfiel
  • Style changes
  • Updated "Boot Mode", "HW Revision History", "Variants Currently In Production" sections
  • Correction of MIO SD Pin-out, System Controller chapter
  • Update and new sub-sections on "On Board Peripherals and Interfaces" sections

2017-08-07

v.5

Jan Kumann

Initial version.

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