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| Carrier Model | Notes |
|---|---|
| Custom PCB | use simple Board Part files, if MIO connected is different to TEBF0808 |
| TEBF0808 | Used as reference carrier. |
| TEBT0808 | Change UART0 to UART1 (MIO68...69) and regenerate design |
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- Select JTAG as Boot Mode (see Carrier Description and ZynqMP TRM)
- Connect JTAG to Host PC
- Power On
- Open Vivado Hardware Manager with Auto Connect
- Right Click to FPGA Device XCU... and select Add Configuration Memory Device
- Select correct Flash Typ (see schematics or FPGAFLASHTYP on test_board/board_files/TE0808_board_files.csv)
- Open Program Configuration Memory Device
- Configuration file: test_board/prebuilt/boot_image/<short dir>/hello_te0808/Boot.
- bin
- Zynq FSBL: test_board/prebuilt/software/<short dir>/zynqmp_fsbl.elf
- Program Device Flash
Use SDK instead of Vivado is also possible, see: SDK Projects#Xilinx%22HelloWorld%22onZynqMP
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System Design - Vivado
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<!-- Description of Block Design, Constrains... BD Pictures from Export... --> |
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Overview
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