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See Xilinx datasheet DS925 for additional information. User should also check related carrier board documentation when choosing carrier board design for TE0715 module.
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Power Rails
Power Rail Name on B2B Connector | JM1 Pins | JM2 Pins | Direction | Notes |
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VIN | 1, 3, 5 | 2, 4, 6, 8 | Input | Supply voltage from the carrier board. |
3.3V | - | 10, 12 | Output | Internal 3.3V voltage level. |
3.3VIN | 13, 15 | - | Input | Supply voltage from the carrier board. |
JTAG VREF | - | 91 | Output | JTAG VREF as output Attention: net name on schematic is "3.3VIN" |
VCCO_64 | - | 7, 9 | Input | High performance I/O bank voltage. |
VCCO_65 | - | 5 | Input | High performance I/O bank voltage. |
VCCO_66 | 9, 11 | - | Input | High performance I/O bank voltage. |
Table 15: TE0820-02 power rails.
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