Page History
...
| Date | Vivado | Project Built | Authors | Description |
|---|---|---|---|---|
| 2018-05-15 | 2017.4 | TE0841-test_board_noprebuilt-vivado_2017.4-build_08_20180515144542.zip TE0841-test_board-vivado_2017.4-build_08_20180515144523.zip | John Hartfiel |
|
...
File | File-Extension | Description |
|---|---|---|
| BIT-File | *.bit | FPGA (PL Part) Configuration File |
| DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
| Diverse Reports | --- | Report files in different formats |
| Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI and PetaLinux |
| LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
| Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
| SREC-File | *.srec | Converted Software Application for MicroBlaze Processor Systems |
Download
Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.
...
Overview
Content Tools