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DateVivadoProject BuiltAuthorsDescription
2018-07-112018.2TE0808-test_board_noprebuilt-vivado_2018.2-build_02_20180711143743.zip
TE0808-test_board-vivado_2018.2-build_02_20180711143702.zip		John Hartfiel
  • additional notes for FSBL generated with Win SDK
  • changed *.bif
2018-03-292017.4TE0808-test_board-vivado_2017.4-build_07_20180329151341.zip
TE0808-test_board_noprebuilt-vivado_2017.4-build_07_20180329151355.zip		John Hartfiel
  • new assembly variant
2018-01-162017.4TE0808-test_board-vivado_2017.4-build_04_20180116144644.zip
TE0808-test_board_noprebuilt-vivado_2017.4-build_04_20180116144657.zip		John Hartfiel
  • Update Board Part for TEBF0808
    • no changes for test board design and minimal board parts
2018-01-152017.4TE0808-test_board-vivado_2017.4-build_03_20180115084954.zip
TE0808-test_board_noprebuilt-vivado_2017.4-build_03_20180115085020.zip		John Hartfiel
  • rework Board Part Files
2017-12-202017.2

TE0808-test_board-vivado_2017.2-build_07_20171220192501.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_07_20171220192448.zip

John Hartfiel
  • Update Board Part Files
2017-11-222017.2TE0808-test_board-vivado_2017.2-build_05_20171122080211.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_05_20171122080228.zip		John Hartfiel
  • Update Board Part CSV File
  • Regenerate design
2017-11-162017.2

TE0808-test_board-vivado_2017.2-build_05_20171116151545.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_05_20171116151600.zip

John Hartfiel
  • Update Board Part CSV File with new Flash assembly variants
2017-11-132017.2TE0808-test_board-vivado_2017.2-build_05_20171113140954.zip
TE0808-test_board_noprebuilt-vivado_2017.2-build_05_20171113141908.zip		John Hartfiel
  • initial release

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SoftwareVersionNote
Vivado20172018.42needed
SDK20172018.42needed

Hardware

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Hardware Support
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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
TE0808-ES1 es1REV02, REV032GB64MB

Xilinx has stopped ES1 support with 2018.2, please use 2017.4 reference design

TE0808-ES2 es2REV03, REV042GB64MB

TE0808-2ES2 2es2REV03, REV042GB64MB

TE0808-04-09EG-1EA9eg_1eaREV042GB64MB

TE0808-04-09EG-1EB9eg_1ebREV044GB64MB

TE0808-04-09EG-1ED9eg_1ebREV044GB64MB1,0 mm connector
TE0808-04-09EG-1EE9eg_1ebREV044GB128MB

TE0808-04-09EG-1EL9eg_1ebREV044GB128MB1,0 mm connector
TE0808-04-09EG-2IB9eg_2ibREV044GB64MB

TE0808-04-09EG-2IE9eg_2ibREV044GB128MB

TE0808-04-06EG-1EE6eg_1eeREV044GB128MB

TE0808-04-06EG-1E36eg_1eeREV044GB128MB1,0 mm connector
TE0808-04-15EG-1EB15eg_1ebREV044GB64MB

TE0808-04-15EG-1EE15eg_1ebREV044GB128MB

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Reference Design is available on:

Design Flow

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Basic Design Steps
Add/ Remove project specific 
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TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality 


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
                Important: Use Board Part Files, which did not ends with *_tebf0808
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects

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For SDK project creation, follow instructions from:

SDK Projects

Application

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zynqmp_fsbl

Xilinx default FSBL

zynqmp_fsbl_flash

TE modified 20172018.4 2 FSBL

Changes:

  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

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hello_te0808

Hello TE0808 is a Xilinx Hello World example as endless loop instead of one console output.

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DateDocument RevisionAuthorsDescription

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modified-date
modified-date
dateFormatyyyy-MM-dd

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current-version
current-version
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  • Release 2018.2

v.20John Hartfiel
  • new assembly variant
2018-02-08v.19John Hartfiel
  • Release 2017.4
2017-12-20v.14John Hartfiel
  • Design Update
  • typo correction on documentation
2017-11-22v.10John Hartfiel
  • Update assembly versions with new Flash size
  • Udate HW Table Name
  • Update Design
2017-11-14v.6John Hartfiel
  • Release 2017.2

All

Page info
modified-users
modified-users

 


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