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Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashOthersNotes
TE0841-01-035-1C 01_35_1cREV012x 512MB DDR432MB---
TE0841-01-035-1I01_35_1iREV012x 512MB DDR432MB---
TE0841-01-035-2I01_35_2iREV012x 512MB DDR432MB---
TE0841-01-040-1C01_40_1cREV012x 512MB DDR432MB---Serial number 512479 up tp 512474  has same 64MB Flash like REV02
TE0841-01-040-1I01_40_1iREV012x 512MB DDR432MB---
TE0841-01-040-2I01_40_2iREV012x 512MB DDR432MB---
TE0841-02-035-1C02_35_1cREV022x 1GB DDR464MB---
TE0841-02-035-1I02_35_1iREV022x 1GB DDR464MB---
TE0841-02-035-2I02_35_2iREV022x 1GB DDR464MB---
TE0841-02-040-1C02_40_1cREV022x 1GB DDR464MB---
TE0841-02-040-1I02_40_1iREV022x 1GB DDR464MB---
TE0841-02-040-1IL02_40_1iREV022x 1GB DDR464MBlow profile B2B connector

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For general structure and of the reference design, see Project Delivery - Xilinx devices

Design Sources

TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
<design name>/firmware		Vivado Project will be generated by TE Scripts
SDK/HSI<design name>/sw_libAdditional Software Template for SDK/HSI and apps_list.csv with settings for HSI

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Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:Vivado/SDK/SDSoCXilinx Development Tools

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter for minimum setup
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project
    1. Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Generate MCS Firmware (optional):
    1. Create SDK Project with TE Scripts on Vivado TCL: TE::sw_run_sdk
    2. Create "SCU" application
      Note: Select MCS Microblaze and SCU Application
    3. Select Release Built
    4. Regenerate App
  7. Generate Programming Files with HSI/SDK
    1. Run on Vivado TCL: TE::sw_run_hsi
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdk
      Note: See SDK Projects
  8. Copy "\prebuilt\software\<short name>\srec_spi_bootloader.elf" into  "\firmware\microblaze_0\"
  9. (optional) Copy "\\workspace\sdk\scu\Release\scu.elf" into  "\firmware\microblaze_mcs_0\"
  10. Regenerate Vivado Project or Update Bitfile only with "srec_spi_bootloader.elf" and "scu.elf"
  11. Generate MCS file with Bitfile and application for SREC Bootloader
    1. Create SDK Project with TE Scripts on Vivado TCL: TE::sw_run_hsi
      Note: SREC convertion from *.elf to *.srec will be done by scripts, alternative use SDK, see SDK Projects

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