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titleTE0701-06 block diagram
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TE0706-01
TE0701 block diagram
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Main Components

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  • Picture of the PCB (top and bottom side) with labels of important components
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titleTE0701-06 main components
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  1. HDMI connector (1.4 HEAC support), J4
  2. Micro-USB2 connector, J12
  3. Pmod connector, J5

  4. Pmod connector, J6
  5. User push-button ("RESTART" button by default), S2
  6. User push-button ("RESET" button by default), S1
  7. 8x red user LEDs, D1 ... D8
  8. Mini-USB2 connector, J7
  9. User 4-bit DIP switch, S3
  10. VITA 57.1 compliant LPC FMC connector, J10
  11. Barrel jack for 12V power supply, J13
  12. ARM JTAG connector (DS-5 D-Stream), J15
  13. User 4-bit DIP switch, S4
  14. Pmod connector, J1
  15. RJ45 Gigabit Ethernet connector, J14
  16. SD Card connector, J8
  17. Pmod connector, J2
  18. Jumper, J18
  19. Mini CameraLink connector, J3
  20. CR1220 Backup-Battery holder, B1
  21. Trenz Electronic 4 x 5 modules B2B connectors, JB1 ... JB3
  22. Jumper J16, J17, J21
  23. Jumper J9, J19, J20
  24. Analog Devices ADV7511 HDMI Transmitter, U1
  25. Lattice Semiconductor MachXO2 1200 HC System Controller CPLD, U14
  26. FTDI FT2232H USB2 to JTAG/UART Bridge, U3

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anchorFigure_SIP_JTAG/UART
titleJTAG/UART interface
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Micro-USB2 Connector

The TE0701 carrier board can be configured as a USB host. Hence, it must provide from 5.25V to 4.75V to the board side of the downstream connection (micro-USB port on J12). To provide sufficient power, a TPS2051 power distribution switch is located on the carrier board in between the 5V power supply and the VBUS signal of the USB downstream port interface. If the output load exceeds the current-limit threshold, the TPS2051 limits the output current and pulls the over-current logic output (OC_n) low, which is routed to the on-board CPLD. The TPS2051 is put into operation by setting J19 CLOSED. J20 provides an extra 200µF decoupling capacitor (in addition to 10µF) to further stabilize the output signal. Moreover, a series terminating resistor of either 1K (J9: 1-2, 3) or 10K (J9: 1, 2-3) is selectable on the "USB-VBUS" signal. Both signals, USB-VBUS and VBUS_V_EN (that enables the TPS2051 on "high") are routed (as well as the corresponding D+/- data lines) via the on-board connector directly to the USB 2.0 high-speed transceiver PHY of the mounted SoM. In summary, the default jumper settings are the following: J9: 1-2, 3 (1K series terminating resistor); J19: CLOSED (TPS2051 in operation); J20: CLOSED (200 µF added).

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titleTE0701 MicroUSB2 interface configuration
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MMC/SD-Card Socket

MMC/SD-Card socket is not directly wired to the B2B connector pins, but through a Texas Instruments TXS02612 SDIO Port Expander, which is needed for voltage translation due to different voltage levels of the Micro SD Card and MIO-bank of the Xilinx Zynq module. The Micro SD Card has 3.3V signal voltage level, but the MIO-bank on the Xilinx Zynq module has VCCIO of 1.8V.

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titlePower Distribution
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Power-On Sequence

The on-board voltages 3.3V and 5.0V of the carrier board will be powered up simultaneously when 12V power supply is connected to the barrel jack J10.

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titlePower Sequency
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Configuring mounted SoM's PL bank VCCO FMC_VADJ

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There are two baseboard supply voltages VIOTA and VIOTB connected to the 4 x 5 SoM's PL IO-bank. The supply-voltages have following pin assignments on B2B-connectors:

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