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Comment: Reverted from v. 75
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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/4x5+Module+Integration+Guide
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Table of Content

Table of Contents
outlinetrue

...

Module Power Connection Table

 

Scroll Title
titleModule B2B FPGA-Banks and Voltages

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

 15VCCIOCVCCIOB VCCIOC
Group123456789
Module ModelBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltageBankIOsTypeVoltage  

TE0710B1548HRVCCIOA--------B3450HRVCCIODB166HR3.3VB148HR3.3V2x 100Mbit ETH    




TE0711B1548HRVCCIOAB3436HRVCCIOBB1418HR3.3VB3550HRVCCIODB166HR1.8VB148HR3.3VB348HRVCCIOBB34 (4)
USB
TE0712

B16

48HRVCCIOAB1320HRVCCIOBB1418HR3.3VB1550HRVCCIODB136HRVCCIOBB148HR3.3V

1x 100Mbit ETH / B13

4HRVCCIOB
B14
TE0713                             





























TE0715-xx-15B1348HRVCCIOAB3416HRVCCIOCB3418HRVCCIOCB3550HRVCCIODB5016MIO1.8VB5008MIO3.3V1x Gbit ETH


SGMIIUSB 
TE0715-xx-30B1348HRVCCIOAB3416HRHPVCCIOCB3418HRHPVCCIOCB354050HRHPVCCIODB5016MIO1.8VB5008MIO3.3V1x Gbit ETH   


SGMIIUSBTE0715-xx-30
TE0720B35B1348HRVCCIOAB341636HPHRVCCIOBB34B3318HPHRVCCIOCB35B134050HPHRVCCIODB5016MIO1.8VB5008MIO3.3V1x Gbit ETH   


SGMIIUSBTE0720
TE0820*B35B6648HRHPVCCIOAB34 B653616HR HP VCCIOCB33 B6518HR HPVCCIOC VCCIOCB13B6450HR HPVCCIODB5016MIO13.8V3VB500 B5018MIO3.3V1x Gbit ETH


  SGMII  USB
 TE0741SGMIIB13USBTE0820*B664948HRHPVCCIOA B65B1616 HPHRVCCIOB B65B1518 HPHR VCCIOCVCCIOCB64B1250 HPHRVCCIODB501GTX6MIO3.3V B50181 Lane

B148HRMIO3.3V1x Gbit ETH    SGMII USBGTX2 Lanes

GTX
TE0742*





























TE0841B64TE0741B1348HRVCCIOAB16B6616HRHPVCCIOBB15B6818HRHPVCCIOCB12B6750HRHPVCCIODGTXGTH1 Lane 

 B65B148HR3.3VGTXGTH2 Lanes  GTX 
TE0742*                              
TE0841B6448HRVCCIOAB6616HPVCCIOBB6818HPVCCIOCB6750HPVCCIODGTH1 Lane  B658HR3.3VGTH2 Lanes  GTH 
TE0842*                              

I/O resource comparison for all 4x5 modules. There are maximum 4 user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD).

Attention: Maximum supply voltage for HP banks is 1.8V.

 

Scroll Title
titleModule basic power and group pin assignment, recommended to verify with Schematics

Image Removed

 

Carrier Board Power Connection Table



GTH
TE0842*





























I/O resource comparison for all 4x5 modules. There are maximum 4 user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD).

Attention: Maximum supply voltage for HP banks is 1.8V.



Scroll Title
titleModule basic power and group pin assignment, recommended to verify with Schematics

Image Added


Carrier Board Power Connection Table

Scroll Title
titlePower Pin Connection on different Carrierboards

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

IO VoltageB2B Connector

Carrier Boards

NameDirection*JB1JB2TE0701TE0703 Rev01 - Rev04TE0703 Rev 05TE0705TE0706TEBA0841TEBA0841 REV01


PinPinSchematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.
PWR_1out2,4,61,3,5,75V05V3.3V3.3V3.3V3.3V5V05V3.3V3.3V3.3Vuse ext. 3.3V power supply3.3Vuse ext. 3.3V power supply
VCCIOAout10,12
VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO35

R23→M3.3VOUT

J1B-B1

VCCIOA

J5→M3.3VOUT, M1.8VOUT

R23→M3.3VOUT

J1-B1

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO35R20->M3.3VOUT/J6B-B32VCCIOA

J26→ M1.8VOUT, 2.5V, 3.3V_OUT

J20-6,J20-45

VCCIOAJ26→ M1.8VOUT, 2.5V, 3.3V_OUT
J20-6,J20-45
VCCIODout
8,10VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO13

R26→M3.3VOUT

J2B-B1

VCCIOD

J10→M3.3VOUT, M1.8VOUT

R26→M3.3VOUT

J2B-B1

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO13R22->M3.3VOUT/J6B-B1VCCIOD

J27→ M1.8VOUT, 2.5V, 3.3V_OUT

J17-6,J17-45

VCCIOD

J27→ M1.8VOUT, 2.5V, 3.3V_OUT

J17-6,J17-45

PWR_2out14,16
3V3IN3.3V
Scroll Title
titlePower Pin Connection on different Carrierboards
VCCIOAVCCIODVCCIOB
IO VoltageB2B Connector

Carrier Boards

NameDirection*JB1JB2TE0701TE0703 Rev 01 - Rev 04TE0703 Rev 05TE0705TE0706TEBA0841 REV02
  PinPinSchematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.Schematic NameValue,Option,Comp.
PWR_1out2,4,61,3,5,75V05V3.3V3.3V3.3V3.3V5V03V3IN5V3.3V3.3V3.3V3.3Vuse ext. 3.3V power supply3.3Vuse ext. 3.3V power supply
VCCIOBout
102,12 4VIOTBno name / VIOTA

FMC_VADJ

2V5

3.3VOUT

VCCIO35VCCIO34

R23→M3J5→M3.3VOUT

J1B-B1B32

VCCIOAVCCIOB

J5→M3J8→M3.3VOUT,M1.8VOUT

R23→M3.3VOUT

J1-B1J2B-B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO35R20->M3.3VOUT/J6B-B32VCCIOA1.8V1.8VVCCIOB

J5→

J26→

M1.8VOUT, 2.5V, 3.3V_OUT


J20-6,J20-45

VCCIOBNC
VCCIOCout 8,10
6VIOTBno name / VIOTA

FMC_VADJ

2V5

3.3VOUT

VCCIO13VCCIO33

R26→M3R25→M3.3VOUT

J2B-B1B32

VCCIODVCCIOC

J10→M3J9→M3.3VOUT, M1.8VOUT

R26→M3R25→M3.3VOUT

J2B-B1B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO13VCCIO33R22R21->M3.3VOUT/J6B-B1VCCIODVCCIOCJ27→ J6→ M1.8VOUT, 2.5V, 3.3V_OUTVCCIOCNCJ17-6,J17-45
PWR_2M1outin14,16 
9,113.3VOUT3.3V3.3VOUT3V3IN3.3VM3.3VOUT3.3V3.3VOUT3.3VM3.3VOUT3.3V3.3V_OUT3V3IN3.3V3.3V_OUT3.3V
 PWR_M2 in40
outVIOB 2,4no name / VIOTA

FMC_VADJ

2V5

3.3VOUT

VCCIO34

J5→M3.3VOUT

J1B-B32

VCCIOB

J8→M3.3VOUT,M1.8VOUT

J2B-B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

1.8V1.8VVCCIOBNC
VCCIOCout 6no name / VIOTA

FMC_VADJ

2V5

3.3VOUT

VCCIO33

R25→M3.3VOUT

J2B-B32

VCCIOC

J9→M3.3VOUT, M1.8VOUT

R25→M3.3VOUT

J2B-B32

VIOTB

FMC_VADJ

2V5

3.3VOUT

VCCIO33R21->M3.3VOUTVCCIOCNC
PWR_M1in 9,113.3VOUT3.3V3.3VOUT3.3VM3.3VOUT3.3V3.3VOUT3.3VM3.3VOUT3.3V3.3V_OUT3.3V
PWR_M2in40 VIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8VVIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8V
PWR_M3in 20NC NC NC NC NC  NC
PWR_VBATout80 VBATB1VBATJ7VBATJ7NC VBATJ9VBATNC

PWR_JTAG

in 92VCCJTAG VCCJTAG VCCJTAG VCCJTAG VCCJTAG VCCJTAGNC

Power comparison of all 4x5 carrier boards. *Power direction based on carrier boards view.There are 4 variable user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD). PWR_1 and PWR_2 are fixed from carrier boards. PWR_M1 and PWR_M2 normally use default value from module. NC=Not Connected

Attention: On some carrier boards the user supplied I/O voltages are connected together (red colored schematic names).

 

...

titleCarrierboard basic power and group pin assignment (Top View), recommended to verify with Schematics
1.8VM1.8VOUT1.8VM1.8VOUT1.8VVIOB1.8VM1.8VOUT1.8VM1.8VOUT1.8VM1.8VOUT1.8V
PWR_M3in
20NC
NC
NC
NC
NC

NC
NC
PWR_VBATout80
VBATB1VBATJ7VBATJ7NC
VBATJ9VBATNCVBATNC

PWR_JTAG

in
92VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAG
VCCJTAGNC

Power comparison of all 4x5 carrier boards. *Power direction based on carrier boards view.There are 4 variable user supplied I/O voltages (VCCIOA, VCCIOB, VCCIOC and VCCIOD). PWR_1 and PWR_2 are fixed from carrier boards. PWR_M1 and PWR_M2 normally use default value from module. NC=Not Connected

Attention: On some carrier boards the user supplied I/O voltages are connected together (red colored schematic names).

Scroll Title
titleCarrierboard basic power and group pin assignment (Top View), recommended to verify with Schematics

Image Added

4x5 Module Controller IOs

Scroll Title
title4x5 Module Controller IOs

Scroll Table Layout
orientationlandscape
sortDirectionASC
repeatTableHeadersdefault
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

NameModule B2B PinCarrier B2B PinDirection (Module view)DescriptionRecommendation
JTAGSELJM1-89JB1-90inJTAG Chain multiplexer. Low FPGA, High CPLD.  For module with CPLD only.

Connect Pulldown on carrier.
DIP switch possible.

SC_EN1JM1-28JB1-27inModule power. Set high to enable module power. Note: Power management depends on module. Sometimes this is a only used as Power ON Reset like SC_nRSTConnect Pullup on carrier.
DIP switch possible
SC_NOSEQJM1-7JB1-8in / inoutModule Power management. Set high to disable CPLD power management. Note: Power management depends on module and not all modules support extended power management with CPLD.Connect Pullup on carrier.
DIP switch possible.
SC_PGOODJM1-30JB1-29out / inoutPower Good signal. Is Low, if SC_EN1 is set to zero or if power is not ready, otherwise high impedance output. Note:  Power management depends on module.Connect Pullup on carrier.
Do not use this signal to enable FPGA Bank voltages. It's only for monitoring. To Enable FPGA Banks, use 3.3V(PWR_M1) or 1.8V(PWR_M2) module output. 
SC_BOOTMODEJM1-32JB1-31inBoot Mode selection Pin for Zynq module only. Default low for primary SD boot and high for primary QSPI boot. Note: Depends also on module CPLD firmwareConnect Pullup on carrier.
DIP switch possible.
SC_nRSTJM2-18JB2-17inLow active module reset. Pin force Power one reset on FPGA/SoC. Note: Depending from module CPLD or voltage supervisor is used.Connect Pullup on carrier.
DIP switch possible.

Remove 4x5 module

Widget Connector
urlhttps://www.youtube.com/watch?v=uisv2dWbktc

...

Compatibility Guide

Ethernet LED'S

...

Carrier Board Checklist

Schematic Checklist

...




1Are B2B pin numbers on the connectors mirrored compared to the module pin numbers?As B2B connectors are "unisex" type the do mirror pin numbers when connecting. That is pin1 connects to pin2, and pin2 to pin1, etc.
2Are B2B connectors named JB1, JB2, JB3?This is not a hard requirement, but it helps to use the same identifiers.
3Are all GND pins connected to a common ground net? 
4Are all VIN pins connected together? 
5Is JB2 pin 92 pin used as VREF for the JTAG interface?for future compatibility only, currently all modules have 3.3V JTAG
6Are external circuits/buffers connecting to MIO bank 1 pins powered from JB1 pin 40?JB1 pins 18, 20, 22, 24, 26, 28 use voltage at pin 40 as VCCIO. Currently it is 1.8V for all released modules.

PCB Checklist

...




 1

Are mounting holes placed properly?

Four Mounting holes should always be used. They are required for mounting screws and for module extraction. The mounting holes will also help in dissipating some heat from the module to the carried board PCB. Four holes with a 3.2mm diameter should be placed exactly at the corners of a 34mm by 44mm rectangle.
2Are B2B headers properly placed?B2B headers must be placed and aligned very precisely or the module will not align correctly (in the worst case module insertion could destroy the connectors or the PCB). The B2B headers should be locked on the PCB, and it is recommended that the position and placement be checked against placement dimensions before submitting the PCB files.
3Are B2B headers rotated properly?As B2B header pin numbers differ from module to the carrier (swap of odd and even numbers), it is recommended that that the rotation is checked in the PCB design.
4Height clearance below moduleComponents can be placed below the module but height clearance rules must be obeyed.
5Power dissipation of components below moduleIt is not recommended to place any components with high power dissipation below the module, as there will be almost no airflow below the module.

...

Note

This placement is same for all 4x5 Modules!

...


Top view of the Carrier Board.

Connector numbers as on base! (pin JB1.1 on base would mate to pin JM1.2 on module).