The TE0701 carrier board can be configured as a USB host. Hence, it must provide from 5.25V to 4.75V to the board side of the downstream connection (micro-USB port on J12). To provide sufficient power, a TPS2051 power distribution switch is located on the carrier board in between the 5V power supply and the VBUS signal of the USB downstream port interface. If the output load exceeds the current-limit threshold, the TPS2051 limits the output current and pulls the over-current logic output (OC_n) low, which is routed to the on-board CPLD. The TPS2051 is put into operation by setting J19 CLOSED. J20 provides an extra 200µF decoupling capacitor (in addition to 10µF) to further stabilize the output signal. Moreover, a series terminating resistor of either 1K 10K (J9:1-2, 3) or 10K 1K (J9: 1, 2-3) is selectable on the "USB-VBUS" signal. Both signals, USB-VBUS and VBUS_V_EN (that enables the TPS2051 on "high") are routed (as well as the corresponding D+/- data lines) via the on-board connector directly to the USB 2.0 high-speed transceiver PHY of the mounted SoM. In summary, the default jumper settings are the following: J9: 1-2, 3 (1K 10K series terminating resistor); J19: CLOSED (TPS2051 in operation); J20: CLOSED (200 µF added).
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There are two baseboard supply voltages VIOTA and VIOTB connected to the 4 x 5 SoM's PL IO-bank. The supply-voltages have following pin assignments on B2B-connectors:
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Corrected USB J9 description
v.73
John Hartfiel
correction temperature range
v.72
Ali Naseri
General TRM revision and updated to new style
2018-06-13
v.66
Ali Naseri
updated Power-on sequence diagram
2018-01-12
v.62
John Hartfiel
Dual PMOD note
2017-11-09
v.60
John Hartfiel
add B2B connector section
2017-08-15
v.59
John Hartfiel
Add VCCIO Jumper Pin location.
Updated VADJ description.
2017-08-14
v.58
John Hartfiel
Description correction.
2017-05-25
v.56
Jan Kumann
New physical dimensions drawing of the board.
2017-05-16
v.51
Jan Kumann
A few overall improvements and corrections, new block diagram.
2017-04-11
Ali Naseri
added block diagram
2017-02-15
v.45
Ali Naseri
added warning concerning the use of FTDI tools
2017-02-15
v.40
Ali Naseri
added power-on sequence diagram
2017-01-19
v.35
Ali Naseri
correction of table 3 (switch-positions to adjust FMC_VADJ)
inserted hint to set and measure the PL IO-bank supply-voltages
2017-01-13
v.20
Ali Naseri
added section for baseboard supply voltage configuration