Page History

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Table of contents

Overview

NIOS II Design with SDRAM Controller and 5 different LED sequences, that can be toggled using the user button.

Refer to http://trenz.org/max1000-info for the current online version of this manual and other available documentation.

Key Features

Revision History

Release Notes and Know Issues

Requirements

Software

Hardware

Design supports following modules:

Design supports following carriers:

Additional HW Requirements:

Download

Reference Design is only usable with the specified Quartus version. Do never use different Versions of Quartus Software for the same Project.

Reference Design is available on:

• TEI0001 "Test Board" Reference Design

Design Flow

1. Open file "test_board.quar"
2. Select Tools → Platform Designer  from Quartus menu
3. Open file "NIOS_test_board.qsys" in Platform Designer
4. Open the component "onchip_ram" (double-click)
   1. Enable "Initialize memory content" and "Enable non-default initialization file" at Memory initialization, if disabled
   2. Specify Path for User created initialization file. You can find the file at \software\test_board\mem_init\NIOS_test_board_onchip_ram.hex
5. Select Generate → Generate HDL... from the Platform Designer menu

6. The Generation window will appear

   1. Select "VHDL" as the synthesis language and "None" from the simulation model dropdown menu

   2. Select “Create block symbol file(.bsf)”, if not selected

   3.  Click Generate and close Platform Designer
7. Select Processing → Start Compilation from the Quartus menu to compile the Design

Launch

Programming

JTAG

1. Connect the Module to USB-Port
2. Open the Quartus Prime Programmer from Tools → Programmer
3. If the Arrow-USB-Blaster is not visible:
   1. Click "Hardware Setup..."
   2. Choose at the drop-down menu "Currently selected hardware" Arrow-USB-Blaster[USB0]
   3. Close "Hardware Setup"
4. If the correct configuration file is not set:
   1. Delete other files
   2. Click "Add file..."
   3. select the correct *.sof file (Path: <project_directory>\output_files\test_board.sof)
5. Click start

MAX10 Flash

1. Do step 1 to step 3 from section Programming → JTAG, if not done yet
2. If the correct configuration file is not set:
   1. Delete other files
   2. Click "Add file..."
   3. Select the correct *.pof file (Path: <project_directory>\output_files\test_board.pof)
3. Click start

Usage

1. Prepare Hardware like described on section Programming
2. Connect UART USB (most cases same as JTAG)

UART

1. Open Serial Console "PuTTY"
2. Change settings in category "Session"
   
   1. Connection Type: Serial
   2. COM Port: see device manager (Win OS)
   3. Speed: 115200
3. Select "Implicit CR in every LF" in category "Terminal"
4. Click Open
5. Press reset button at module
   1. SDRAM test is running
   2. Flash test is running
6. After the tests finished, you can toggle between following LED sequences by pressing user button
   1. Spirit level
   2. Case statement sequence
   3. Shift register sequence
   4. Knightrider sequence
   5. Pulse-width modulation sequence

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

Legal Notices