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Note:
Use 'Key Features' description in shoping page, for example: https://shop.trenz-electronic.de/de/TE0728-04-1Q-SoC-Micromodul-mit-Xilinx-Automotive-Zynq-7020-512-MByte-DDR3L-6-x-6-cm

  • Intel® MAX 10 Commercial [10M08SAU169C8G]
    • Package: 169-UBGA
    • Speed Grade: C8 (Slowest)
    • Temperature: 0°C  0°C ~ 85°C
    • Package compatible device 10M02...10M16 as assembly variant on request possible
  • SDRAM Memory up to 64Mb, 166MHz
  • Dual High Speed USB to Multipurpose UART/FIFO IC
  • Quad SPI Flash, 64Mb
  • EEPROM Memory, 4Kb
  • 8x User LED 

  • Micro USB2 socket socket 

  • 18 Bit 2MSPS Analog to Digital Converter

  • 2x SMA Female Connector

  • Power Supply:

    • 5V

  • Others:

    • Dimension: 86.5mm x 25mm

    • Instrumentation Amplifier

    • Differential Amplifier
    • Operational Amplifier

...

Scroll Title
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titleFPGA I/O Banks

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FPGA BankI/O Signal CountConnected toNotes
Bank 1A71x14 Pin header, J1AIN0...6
1Jumper, J3AIN7
Bank 1B51x6 Pin header, J4JTAG_EN, TDI, TDO, TMS, TCK
Bank 2


41x14 Pin header, J1D2...5
5A2D, U15ADC_EN, ADC_SDI, ADC_SDO, ADC_SCK, ADC_CNV
112MHz Oscillator, U7CLK12M
2Amplifier, U12nIAMP_A0, nIAMP_A1
Bank 322SDRAM, U2RAM_ADDR_CMD
Bank 59

1x14 Pin header, J2

DIO6...14
21x14 Pin header, J1DIO0...1
1D12_RDIO12
Bank 616SDRAM, U2DQ0...15
2SDRAM, U2DQM0...1
1D11_RDIO11
Bank 8



8User Red LEDs, D2...9LED0...7
6SPI Flash, U5F_CS, F_CK, F_DI, F_DO, nSTATUS, DEVCLRn
1Red LED, D10CONF_DONE
6FTDI JTAG/UART Adapter, U3BDBUS0...5
1Push Button, S2USER_BTN

JTAG Interface


Micro-USB2 Connector

The Micro-USB2 connector J9 provides an interface to access the UART and JTAG functions via FTDI FT2232 chip. The use of this feature requires that USB driver is installed on your host PCJTAG access to the TEI0015 SoM through pin header connector J4.

Pin Header Connector
Scroll Title
anchorTable_SIPOBP_JTGUSB
titleJTAG pins connectionMicro USB-2 connector pins

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PinsConnected to

JTAG Signal

Note
TMSJ4-6TDIJ4-5TDOJ4-4TCK

J4-3

JTAG_ENJ4-2

On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs
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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

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anchorTable_OBP
titleOn board peripherals

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VBUSUSB_VBUSIt is connected to GND
D+FTDI U3, DP pin
D-FTDI U3, DM pin


JTAG Interface

JTAG access to the TEI0015 SoM through pin header connector J4.

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titleJTAG pins connection

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JTAG Signal

Pin Header Connector

Note
TMSJ4-6
TDIJ4-5
TDOJ4-4
TCK

J4-3


JTAG_ENJ4-2


On-board Peripherals

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


Page properties
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idComments

Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


Scroll Title
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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
SDRAMU2
FTDI FT2232HU3JTAG/UART Adapter
SPI Flash MemoryU5
EEPROMU9
OscillatorU712MHz clock source
ADCU12, U14Analog to Digital Convertor
8x User LEDsD2...9Red LEDs


SDRAM

SDRAM

TEI0015 is equipped with a Winbond 64 MBit (8 MByte) SDRAM chip in standard configuration, variants with 256 Mbit (32 MByte) memory density are also available. The SDRAM chip is connected to the FPGA bank 3 and 6 via 16-bit memory interface with 166MHz clock frequency and CL3 CAS latency.

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Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

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titleSDRAM interface IOs and pins
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SDRAM I/O Signals

Signal Schematic Name

Connected toNotes
Address inputs

A0 ... A13

bank 3-
Bank address inputs

BA0 / BA1

bank 3

-
Data input/output

DQ0 ... DQ15

bank 6

-
Data mask

DQM0 ... DQM1

bank 6

-
ClockCLKbank 3
Control Signals

CS

bank 3

Chip select

CKE

bank 3

Clock enable

RAS

bank 3

Row Address Strobe

CAS

bank 3

Column Address Strobe

WEbank 3Write Enable

FTDI FT2232H

The FTDI chip U3 converts signals from USB2 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip.
FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of Channel B are routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or other standard interfaces.

...

must be mentioned for other assembly options.


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anchorTable_OBP_FTDISDRAM
titleFTDI chip interfaces SDRAM interface IOs and pins

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FTDI Chip U3 PinSDRAM I/O Signals

Signal Schematic Name

Connected toNotes
ADBUS0TCKFPGA bank 1B, pin G2JTAG interface
ADBUS1TDIFPGA bank 1B, pin F5
ADBUS2TDOFPGA bank 1B, pin F6
ADBUS3TMS

FPGA bank 1B, pin G1

BDBUS0BDBUS0FPGA bank 8, pin A4user configurable
BDBUS1BDBUS1FPGA bank 8, pin B4user configurable
BDBUS2BDBUS2FPGA bank 8, pin B5user configurable
BDBUS3BDBUS3FPGA bank 8, pin A6user configurable
BDBUS4BDBUS4FPGA bank 8, pin B6user configurable
BDBUS5BDBUS5FPGA bank 8, pin A7user configurable

SPI Flash Memory

Address inputs

A0 ... A13

bank 3-
Bank address inputs

BA0 / BA1

bank 3

-
Data input/output

DQ0 ... DQ15

bank 6

-
Data mask

DQM0 ... DQM1

bank 6

-
ClockCLKbank 3
Control Signals

CS

bank 3

Chip select

CKE

bank 3

Clock enable

RAS

bank 3

Row Address Strobe

CAS

bank 3

Column Address Strobe

WEbank 3Write Enable


FTDI FT2232H

The FTDI chip U3 converts signals from USB2 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip.
FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of Channel B are routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or other standard interfaces.

The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U9On-board serial configuration memory (U5) is provided by Winbond with 64 MBit (8 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 8 via SPI interface.

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anchorTable_OBP_QSPIFTDI
titleQuad SPI Flash memory interfaceFTDI chip interfaces and pins

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FTDI Chip U3 PinSignal Schematic NameConnected toNotes
ADBUS0TCKFPGA bank 1B, pin G2JTAG interface
ADBUS1TDIFPGA bank 1B, pin F5
ADBUS2TDOFPGA bank 1B, pin F6
ADBUS3TMS

FPGA bank 1B, pin G1

BDBUS0BDBUS0
Signal Schematic NameConnected toNotes
F_CSFPGA bank 8, pin B3chip selectA4user configurable
BDBUS1BDBUS1F_CLKFPGA bank 8, pin A3clockB4user configurable
BDBUS2BDBUS2F_DIFPGA bank 8, pin A2data in / outB5user configurable
BDBUS3BDBUS3nSTATUSFPGA bank 8, pin C4data in / out, configuration dual-purpose pin of FPGAA6user configurable
BDBUS4BDBUS4DEVCLRNFPGA bank 8, pin B9data in / out, configuration dual-purpose pin of FPGAB6user configurable
BDBUS5BDBUS5F_DOFPGA bank 8, pin B2data in / out

EEPROM

A7user configurable


SPI Flash Memory

On-board serial configuration memory (U5) is provided by Winbond with 64 MBit (8 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 8 via SPI interfaceThe configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U9.

Scroll Title
anchorTable_OBP_EEPQSPI
titleI2C EEPROM interface MIOs and pinsQuad SPI Flash memory interface

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Signal Schematic Connected toNotes

EECS

FTDI U3, Pin EECSEECLKFTDI U3, Pin EECLKEEDATAFTDI U3, Pin EEDATA

A2D Convertor

NameConnected toNotes
F_CSFPGA bank 8, pin B3chip select
F_CLKFPGA bank 8, pin A3clock
F_DIFPGA bank 8, pin A2data in / out
nSTATUS

FPGA bank 8, pin C4

data in / out, configuration dual-purpose pin of FPGA
DEVCLRNFPGA bank 8, pin B9data in / out, configuration dual-purpose pin of FPGA
F_DOFPGA bank 8, pin B2data in / out


EEPROM

The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U9The TEI0015 board is equipped with the Analog Devices AD4003BCPZ, 18-bit A2D converter (ADC).

Scroll Title
anchorTable_OBP_A2DEEP
titleA2D converter I2C EEPROM interface MIOs and pins

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PinsSchematicConnected toNotes

IN+

Diff Amplifier U14, VOUT-IN-Diff Amplifier U14, VOUT+SDIBank 2, ADC_SDISDOBank 2, ADC_SDOSCKBank 2, ADC_SCKCNVBank 2, ADC_CNV

LEDs

EECS

FTDI U3, Pin EECS
EECLKFTDI U3, Pin EECLK
EEDATAFTDI U3, Pin EEDATA


ADC

The TEI0015 board is equipped with the Analog Devices AD4003BCPZ, 18-bit 2MSPS ADC.

Scroll Title
anchorTable_OBP_LEDA2D
titleOn-board LEDsA2D converter interface and pins

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Designator
Pins
Color
Connected to
Active Level
Notes
NoteD2...9RedLED1...8Active HighUser LEDsD10RedCONF_DONEActive LowConfiguration DONE LEDD1Green3.3V Power RailActive HighAfter power on it will be on

Micro-USB2 Connector

...

IN+

Diff Amplifier U14, VOUT-
IN-Diff Amplifier U14, VOUT+
SDIBank 2, ADC_SDI
SDOBank 2, ADC_SDO
SCKBank 2, ADC_SCK
CNVBank 2, ADC_CNV


LEDs

Scroll Title
anchorTable_OBP_USBLED
titleMicro USB-2 connector pinsOn-board LEDs

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Designator
Pins
ColorConnected toActive LevelNote
VBUSUSB_VBUSIt is connected to GND
D+FTDI U3, DP pinD-
D2...9RedLED1...8Active HighUser LEDs
D10RedCONF_DONEActive LowConfiguration DONE LED
D1Green3.3V Power RailActive HighAfter power on it will be on
FTDI U3, DM pin