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  1. SMA Connector, J5...6

  2. Amplifier, U12- U14- U6

  3. Series Voltage Reference, U8

  4. Analog to Digital Convertor, U15

  5. Voltage Regulator, U10- U13- U16

  6. Switching Voltage Regulator, U11- U4

  7. Intel® MAX 10, U1

  8. SDRAM Memory, U2

  9. SPI Flash Active serial Memory, U5

  10. 12.00 MHz MEMS oscillator, U7

  11. FTDI USB2 to JTAG/UART adapter, U3

  12. User LEDs, D2...9

  13. 4Kb EEPROM, U9

  14. Configuration LED (Red) , D10

  15. Power-on LED (Green), D1

  16. Push button, S1...2

  17. Micro USB2 Receptacle, J9

  18. 1x14 pin header (Not assembled), J2

  19. 1x6 pin header (Not assembled), J4

  20. Jumper, J3

  21. 1x14 pin header (Not assembled), J1

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Scroll Title
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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
SDRAMU2
FTDI FT2232HU3JTAG/UART Adapter
SPI Flash Memory
Active Serial ConfigurationU5
EEPROMU9
OscillatorU712MHz clock source
ADCU12, U14Analog to Digital Converter
Push ButtonsS1...2
8x User LEDsD2...9Red LEDs


SDRAM

TEI0015 is equipped with a Winbond 64 MBit (8 MByte) SDRAM chip in standard configuration, variants with 256 Mbit (32 MByte) memory density are also available. The SDRAM chip is connected to the FPGA bank 3 and 6 via 16-bit memory interface with 166MHz clock frequency and CL3 CAS latency.

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Scroll Title
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titleFTDI chip interfaces and pins

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FTDI Chip U3 PinSignal Schematic NameConnected toNotes
ADBUS0TCKFPGA bank 1B, pin G2JTAG interface
ADBUS1TDIFPGA bank 1B, pin F5
ADBUS2TDOFPGA bank 1B, pin F6
ADBUS3TMS

FPGA bank 1B, pin G1

BDBUS0BDBUS0FPGA bank 8, pin A4user configurable
BDBUS1BDBUS1FPGA bank 8, pin B4user configurable
BDBUS2BDBUS2FPGA bank 8, pin B5user configurable
BDBUS3BDBUS3FPGA bank 8, pin A6user configurable
BDBUS4BDBUS4FPGA bank 8, pin B6user configurable
BDBUS5BDBUS5FPGA bank 8, pin A7user configurable

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Active Serial Configuration

On-board serial configuration memory (U5) is provided by Winbond with 64 MBit (8 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 8 via SPI interface.

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