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Scroll Title
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titleADC/DAC interface and pins

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PinsSchematicConnected toNotes

nRESET

ADDA_RSTNBank 2, U1
nSYNCADDA_SYNCBank 2, U1
SCLKMCLKBank 2, U1
SDIMOSIBank 2, U1
SDOMISOBank 2, U1
VREFAREFPin Header, J1External reference is 1 V to 3.3 V.  → ???
Internal reference is 2.5 V.
IO0...5AIN0...5

Bank 1, U1

Pin Header, J4


IO6AIN6Testpoint, TP1
IO7AIN7Testpoint, TP2


LEDs

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titleOn-board LEDs

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SchematicDesignator ColorConnected toActive LevelNote
LED1...8D2...9RedBank 3High
LED_PB1...5D13...17RedBank 7High
CONF_DONED10RedBank 6Low
3.3VD1Green3.3VHigh


Push Buttons

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titleOn-board Push Buttons

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SchematicDesignator Connected toFunctionalityNote
RESETS7RESETBank 1HighReset
S2RST_GPIOS2HighBank 4Reset/GPIOS1, S3...6
USER_BTN1...5User push buttonsconnected to bank 3

Clock Sources

S3Bank 3User Push Button
USER_BTN2S4Bank 3User Push Button
USER_BTN3S5Bank 3User Push Button
USER_BTN4S6Bank 3User Push Button
USER_BTN5S1Bank 3User Push Button


Clock Sources

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Scroll Title
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titleOsillators

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DesignatorDescriptionFrequencyNote
U22MEMS Crystal Oscillator25 MHz
U16MEMS Crystal Oscillator12 MHz


Power and Power-On Sequence

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Power supply with minimum current capability of 1A 1 A for system startup is recommended.

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Scroll Title
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titlePower Distribution


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Power-On Sequence

There is no the following power on sequence, After power on, all regulators will be enabled as you can see in . The DCDC converter U7 enables the device U4 according to the diagram below.

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titlePower Sequency


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Voltage

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Protection Circuit

There is a diod transient voltage suppression diode (D12) which protects the board from reverse polarity, voltage spikes. Additionaly there is an Over/under voltage (IC) which protects the board from over voltage damagesovervoltage / undervoltage protection device (U9) for board protection.

Scroll Title
anchorFigure_PWR_VMC
titleVoltage Monitor Circuit


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Power Rails

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titleModule power rails.

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Connector Designator

VCC / VCCIO Schematic Name

Pin DirectionNotes
J125 V / VIN1In
J33.3 V / 3.3V2, 4Out
5 V / 5V5Out
J53.3 V / 3.3V3Out


Bank Voltages

Scroll Title
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titleZynq SoC bank voltages.

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Bank          

Schematic Name

Voltage

Notes
Bank 1...8VCCIO1...83.3VBank 2

VCCIO2

3.3VBank 3 VCCIO33.3VBank 4VCCIO43.3VBank 5VCCIO53.3VBank 6VCCIO63.3VBank 7VCCIO73.3VBank 8VCCIO83.3V

Technical Specifications

Absolute Maximum Ratings



Technical Specifications

Absolute Maximum Ratings

Scroll Title
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Scroll Title
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titleAbsolute maximum ratings

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I/O buffers power supply575
SymbolsDescriptionMinMaxUnitNote
VIN Input supply voltage (J12)
-4.5.05.05VVCCIO
AREFExternal Reference Voltage for ADC/DAC (J1 - 8)-0.33.6VVCCINTCore voltage-0.51.8VVCCD_PLLPLL digital power supply-0.51.8VVCCAPhase-locked loop (PLL) analog power supply-0.53.75VOnly for input usage.
AIN0...5Input Voltage for V_ANAnalog Input Voltage on ADC/DAC (U2J4)-0.33.6VV_DIGOnly for input usage.
AIN6...7Input Voltage for Digital Input Voltage on ADC/DAC (U2TP1...2)-0.33.6VOnly for input usage.
EXT_RSTExternal Reset (J3 - 3V_REF_INInternal Reference Voltage Voltage on ADC/DAC (U2)-0.3534.62VV
D0_REF_EXRXD, D1_TXD, D2...7Arduino Interface (J2External Reference Voltage Voltage on ADC/DAC (U2)-0.3534.62VOnly for input usage.

D8...13, D14_SDA, D15_SCL

Arduino Interface (J1 - 1...6, 9...10)-0.54.2VOnly for input usage.
I2C_SCL, I2C_SDAI2C Interface (J5 - 1...2)-0.34.2VOnly for input usage.

P1_IO1...8, P2_IO1...8,

P3_IO1...8, P4_IO1...8,

P5_IO1...8, P6_IO1...8,

Pmod Interface (P1...6)-0.54.2VOnly for input usage.
CLK_INExternal FPGA Clock (J19)-0.54.2V
CLK_OUTClock / IO (J20)-0.54.2VOnly for input usage.
T_STGStorage Temperature-3585T_STGStorage Temperature-3585°CSee LTC2623WC datasheet


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Scroll Title
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titleRecommended operating conditions.

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VCCIO1353.465
ParameterMinMaxUnitsReference Document
VIN 4.755.25V

AREF13.3V

AIN0...50AREFVSee Cyclone 10 LP datasheet.
VCCINT1.151.25VSee Cyclone 10 LP datasheet.
VCCD_PLL1.151.25VSee Cyclone 10 LP datasheet.
VCCA2.3752.625VSee Cyclone 10 LP datasheet.
V_AN03.3VSee  AD5592RBCPZ datasheet.
V_DIG03.3VSee  AD5592RBCPZ datasheet.
V_REF_IN13VSee  AD5592RBCPZ datasheet.
V_REF_EX2.452.55VSee  AD5592RBCPZ datasheet.


AIN6...70AREFV

EXT_RST-0.53.6V

D0_RXD, D1_TXD, D2...7-0.53.6V

D8...13, D14_SDA, D15_SCL

-0.53.6V

I2C_SCL, I2C_SDA-0.33.3V

P1_IO1...8, P2_IO1...8,

P3_IO1...8, P4_IO1...8,

P5_IO1...8, P6_IO1...8,

-0.53.6V

CLK_IN-0.53.6V

CLK_OUT-0.53.6V

T_OP070°C

See SDRAM W9864G6JT datasheet



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Scroll Title
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titleHardware Revision History

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DateRevisionChangesDocument Link
2018-2-1901-REV01
2018-7-1802
  • Change J5 from SMD
connector
  • Connector to GROVE
connectorConnect clock
  • Connector
  • Change connection of 12 MHz
to Bank 1
  • Connect I2C SLA/SDA to Bank 3
    • Remove SMA Coaxial straight J19,J20
    • clock from Bank 1 to Bank 6
    • Change connection of I2C SLA/SDA from Bank 3 to Bank 6
    • SMA Coaxial Connector J19, J20 not mounted
    • Change connection of CLK_IN/CLK_OUT from Bank 4 to Bank 8
    • Remove DIP Switch S1
    • Add 5 LEDs (red
    LEDs
    • )
    • Add 2 Push
    buttons
    • Buttons
    • Add 64 Mbit QSPI
    flash memory
    • Flash Memory
    • Change SDRAM
    memory, 143 MHz to 166 MHz
    • Memory
    • Remove
    10bit
    • 10 Bit ADC
    • Remove
    10bit
    • 10 Bit DAC
    • Add
    12bit DAC/ADC
  • Remove SMA Coaxial straight J19,J20
  • Remove SMA Coaxial straight J19,J20
  • Remove Tranciever USB
  • Remove DIP switch S2
  • Different Power Dependencies
  • Remove 24MHz Oscillator
    • 12 Bit ADC/DAC
    • Remove USB Transceiver
    • Remove 24 MHz Oscillator
    • Remove DIP Switch S2
    • Changed Power Supply Circuit
    • Add 4 Pmod Host Sockets
    Add 4x Pmod SMD host socket
    		REV02


    Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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    Scroll Title
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    titleDocument change history.

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    DateRevisionContributorDescription

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    • Updated Figures

    • Updated Technical Specifications

    		v.40Pedram Babakhani
    • change list

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