...
Scroll Title |
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anchor | Table_SC_Ports |
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title | SC CPLD ports |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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VHDL Port name | Direction | SC CPLD Pin | Connected to | Function | Notes |
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ACBUS0 |
| A4 | FTDI U4, pin 22 | GPIO's available to user
| currently not used/implemented (FIFO or other FTDI functions when FTDI reprogrammed)
| ACBUS1 |
| B4 | FTDI U4, pin 23 | ACBUS2 |
| A5 | FTDI U4, pin 24 | ACBUS3 |
| B5 | FTDI U4, pin 25 | ACBUS4 |
| A6 | FTDI U4, pin 26 | ACBUS5 |
| B6 | FTDI U4, pin 27 | ACBUS6 |
| A7 | FTDI U4, pin 28 | ACBUS7 |
| A8 | FTDI U4, pin 29 | ADBUS4 |
| A2 | FTDI U4, pin 17 | ADBUS5 |
| B2 | FTDI U4, pin 18 | ADBUS6 |
| A3 | FTDI U4, pin 19 | ADBUS7 |
| B3 | FTDI U4, pin 20 | P_TCK | IN | G2 | FTDI U4, pin 12 | Forwarded JTAG signals from FTDI chip. Signal names: TCK, TDI, TDO, TMS
| (FIFO or other FTDI functions when FTDI reprogrammed)
| P_TDI | IN | F5 | FTDI U4, pin 13 | P_TDO | OUT | F6 | FTDI U4, pin 14 | P_TMS | IN | G1 | FTDI U4, pin 15 | M_TCK | OUT | H5 | JB2, pin 100 | 4x5 Module JTAG
| Bank with VCCIO is VREF_JTAG from Module
| M_TDI | OUT | J2 | JB2, pin 96 | M_TDO | IN | J1 | JB2, pin 98 | M_TMS | OUT | H6 | JB2, pin 94 | FMC_TCK | OUT | F8 | J1, pin D29 | FMC JTAG
| TRST not used
| FMC_TDI | OUT | M7 | J1, pin D30 | FMC_TDO | IN | N7 | J1, pin D31 | FMC_TMS | OUT | M8 | J1, pin D33 | FMC_TRST |
| N8 | J1, pin D34 | PCIE_TCK |
| L11 | J3, pin A5 | PCIe JTAG
| Currently not used
| PCIE_TDI |
| N12 | J3, pin A6 | PCIE_TDO |
| M12 | J3, pin A7 | PCIE_TMS |
| M13 | J3, pin A8 | PCIE_TRST |
| G10 | J3, pin B9 | PCIE_PERST | IN | F12 | J3, pin A11 | Indication that PCIe Bus is up (power, clocks) |
| EN_FMC | OUT | L4 | U14, pin 9 | Enable switched 3.3V FMC power | pulled down | EN_FMC_VADJ | OUT | K7 | U1, pin 41 | Enable IO power FMC_VADJ | pulled down | EN_PER | OUT | F13 | Q4, pin 5 | Enable perepherie power 3V3_PER | pulled down | FAN_FMC_EN | OUT | K8 | Q1, pin 5 | Enable FMC FAN | floating during configuration (no pull down) | FMC_PG_C2M | OUT | M5 | J1, pin D1 | Indicate that all FMC related powers are up | pulled up | FMC_PRSNT_M2C_L | IN | E9 | J1, pin H2 | Indicate if FMC installed | Low when FMC present | FMC_SCL | OUT | J8 | J1, pin C31 | I2C 2-wire serial bus | MUX in CPLD | FMC_SDA | INOUT | F9 | J1, pin C30 | PG_FMC_VADJ | IN | J6 | U1, pin 35 | Indicate FMC VADJ power is up |
| FF_RSTL | OUT | B9 | J13, pin 6 and J18, pin 6 | Reset configuration | Both FF are resetted simultanously when pulled LOW | FFA_INTL | IN | E8 | J13, pin 5 | Indicate interrrupt | LOW when fault condition, pulled up | FFA_MPRS | IN | C10 | J13, pin 3 | Indicate FF Module installed | LOW when Module present, pulled up | FFA_MSEL | OUT | C9 | J13, pin 4 | Select attached FF Module | Pull low to use I2C | FFA_SCL | OUT | D6 | J13, pin 8 | I2C 2-wire serial bus | MUX in CPLD | FFA_SDA | INOUT | E6 | J13, pin 7 | FFB_INTL | IN | A10 | J18, pin 5 | Indicate interrrupt | LOW when fault condition, pulled up | FFB_MPRS | IN | A11 | J18, pin 3 | Indicate FF Module installed | LOW when Module present, pulled up | FFB_MSEL | OUT | B10 | J18, pin 4 | Select attached FF Module | Pull low to use I2C | FFB_SCL | OUT | D8 | J18, pin 8 | I2C 2-wire serial bus | MUX in CPLD | FFB_SDA | INOUT | A9 | J18, pin 7 | CPLD_IO_1 | IN | B12 | JB1, pin 88 | (M)IOs from 4x5 Module | (M)IOs used for ETH PHY LEDs
| CPLD_IO_2 | IN | A12 | JB1, pin 92 | (M)IOs from 4x5 Module | M10_RST |
| D1 | TP22 |
| Not used
| M10_RX |
| E4 | TP24 | M10_TX |
| E3 | TP23 | EN1 | OUT | D11 | JB1, pin 27 | Enable on module power | Depends on module, on some similar to reset. | MODE | OUT | B11 | JB1, pin 31 | Boot Mode selection | For Zynq modules only. (LOW → SD, HIGH → primary QSPI) | NOSEQ | OUT | E13 | JB1, pin 8 | Disable module CPLD power management | Depends on module. On some modules no extended CPLD power management avaialble. | PGOOD | INOUT | C11 | JB1, pin 29 | Power good signal | This is only for monitoring, do not use as powerenable! Pulled up. | RESIN | OUT | E12 | JB2, pin 17 | Module Reset | Aktive LOW | M3.3VOUT | IN | M4 | JB2, pin 9 and 11 | Indicates module power is up | Used for perepherie power enable. Floating when no module installed (no pull down). | SFPA_LOS | IN | M10 | J12, pin 8 | SFP signal loss | HIGH indicates signal loss | SFPA_M-DEF0 | IN | F10 | J12, pin 6 | SFP modul absent | HIGH when module physically absent | SFPA_RS0 | OUT | N10 | J12, pin 7 | SFP rate select RX | LOW for 1000BASE-SX, HIGH for 10GBASE-SR | SFPA_RS1 | OUT | M11 | J12, pin 9 | SFP rate select TX | LOW for 1000BASE-SX, HIGH for 10GBASE-SR | SFPA_SCL | OUT | L10 | J12, pin 5 | I2C 2-wire serial bus | MUX in CPLD | SFPA_SDA | INOUT | N9 | J12, pin 4 | SFPA_TX_DIS | OUT | M9 | J12, pin 3 | SFP transmitter disable | HIGH disables transmitter | SFPA_TX_FAULT | IN | G9 | J12, pin 2 | Indicates SFP laser fault | HIGH indicates fault | VID0_FMC_VADJ | OUT | E10 | U1, pin 34 | FMC_VADJ Voltage select | Chip internal pulled up
| VID1_FMC_VADJ | OUT | J7 | U1, pin 33 | VID2_FMC_VADJ | OUT | L5 | U1, pin 32 | VID0 | IN | K6 | S2-1 | For FMC_VADJ Voltage select
|
| VID1 | IN | N5 | S2-2 | VID2 | IN | N4 | S2-3 | FMC_JTAG | IN | L3 | S2-6 | Select FMC JTAG port |
| CM0 | IN | M3 | S2-7 | SoM enable power |
| CM1 | IN | L2 | S2-8 | SoM Bootmode |
| CM2 | IN | K2 | S3-1 | disable SoM pwersequenzing |
| USR0 | IN | K1 | S3-2 | FMC VADJ power enable | also if no FMC installed | USB_OC | IN | D9 | U12, pin 5 |
|
| BUTTON | IN | N6 | S1 | Module reset button |
| LED1 | OUT | J5 | D1 | user LED |
| LED2 | OUT | K5 | D2 | LED_D4 | OUT | C2 | D4 | Status LED |
| PHY_LED1 | OUT | D12 | J9 | Phy LEDs
|
| PHY_LED1R | OUT | C13 | J9 | PHY_LED2 | OUT | B13 | J9 | PHY_LED2R | OUT | C12 | J9 | A_00_N | IN | J10 | JB1, pin 38 | SDA IN | "three wire" I2C | A_00_P | IN | K10 | JB1, pin 36 | SCL IN | "three wire" I2C | A_01_N | OUT | L12 | JB1, pin 35 | TX data | RGPIO | A_01_P | OUT | K11 | JB1, pin 37 | SDA OUT | "three wire" I2C | A_02_N | IN | J12 | JB1, pin 41 | RX CLK | RGPIO | A_02_P | IN | K12 | JB1, pin 39 | RX data | RGPIO | A_03_N |
| H10 | JB1, pin 44 | Module to CPLD communication | currently not used | A_03_P |
| J9 | JB1, pin 42 | A_04_N |
| H13 | JB1, pin 47 | A_04_P |
| J13 | JB1, pin 45 | A_05_N |
| H8 | JB1, pin 57 | A_05_P |
| H9 | JB1, pin 55 | A_06_NP | IN | G12G13 | JB1, pin 4951 | A_06_PN | IN | G13G12 | JB1, pin 5149 | I2C GPIO MUX 0 | I2C MUX also used for FireFlys MSEL | A_07 | IN | L13 | JB1, pin 34 | I2C GPIO MUX 1 |
|
Functional Description
Power Management
Status LED
FMC VADJ Power
SFP control
FFA & FFB control
JTAG MUX
Module control
RESET
I2C MUX
PHY LEDs
RGPIO
The RGPIO is for communiction betweenn SoC and SC CPLD it handels the signals:
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anchor | Table_RGPIO |
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title | Signals handeld by RGPIO |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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The M3_3VOUT rail of the attached SoM is used to power up all powerrails etc on TEF1002:
Scroll Title |
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anchor | Table_power_management |
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title | Power Management |
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To Do ...
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FMC_PWR_set <= M3_3VOUT
EN_FMC <= rgpio_out_data_i(17) and M3_3VOUT and NOT(FMC_PRSNT_M2C_L) when soc_rgpio_active='1' else M3_3VOUT and NOT(FMC_PRSNT_M2C_L);
FMC_PWR_set<= rgpio_out_data_i(16) and M3_3VOUT when soc_rgpio_active='1' else M3_3VOUT;
FAN_FMC_EN <= NOT(FMC_PRSNT_M2C_L) and FMC_PWR_set;
EN_FMC_VADJ <= (NOT(FMC_PRSNT_M2C_L) and FMC_PWR_set) or USR0;
FMC_PG_C2M <= (PG_FMC_VADJ and M3_3VOUT);
--Perepherie power, Enable Power for SFP and FireFly
PWR_EN_Signal <= rgpio_out_data_i(15) and M3_3VOUT when soc_rgpio_active='1' else M3_3VOUT;
EN_PER <= PWR_EN_Signal ;
Status LED
The Status LED D4 is utilized in the following way:
Scroll Title |
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anchor | Table_LED_Status |
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title | Status LED description |
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Sequenz |
| Description |
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*ooooooo | 1 times fast blink with a break | SOM PGOOD fail | **oooooo | 2 times fast blink with a break | not used | ***ooooo | 3 times fast blink with a break | FMC power Error | ****oooo | 4 times fast blink with a break | not used | *****ooo | 5 times fast blink with a break | USB Power Error | ******oo | 6 times fast blink with a break | Firefly A or B Error | *******o | 7 times fast blink with a break | SFPA_TX_FAULT or SFPA_LOS | ON | LED ON | All OK |
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FMC VADJ Power
Three of the dip switches are linked to the voltage selection signals of FMC_VADJ:
Scroll Title |
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anchor | Table_FMC_VADJ |
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title | FMC_VADJ selection |
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| VID0, S2-1 | VID1, S2-2 | VID2, S2-3 |
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3.3V | OFF | OFF | OFF |
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2.5V | ON | OFF | OFF |
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1.8V | OFF | ON | OFF |
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1.5V | ON | ON | OFF |
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1.25V | OFF | OFF | ON |
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1.2V | ON | OFF | ON |
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0.8V | OFF | ON | ON |
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SFP control
SFP control signals are handled by RGPIO:
Scroll Title |
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anchor | Table_SFP_Control |
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title | Connection SFP Control |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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OUTPUT | INPUT | Function | Notes |
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rgpio_in_data_i(19) | SFPA_TX_FAULT | Transmitter fault | 'high' when fault detected | rgpio_in_data_i(18) | SFPA_MDEF0 | Module absent | 'high' when absent | rgpio_in_data_i(17) | SFPA_LOS | Signal Loss | 'high' when signal loss | SFPA_TX_DIS | rgpio_out_data_i(22) | Transmitter disable | Disable transmitter when 'high' | SFPA_RS0 | rgpio_out_data_i(21) | Select recieve signal rate |
| SFPA_RS1 | rgpio_out_data_i(20) | Select transmit signal rate |
|
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FFA & FFB control
When RGPIO is aktive the FF resets are driven low via rgpio_out_data_i(23).
For FF I2C see I2C chapter. Module Present and Interrupt signals are forwarded to SoM via RGPIO ports:
Scroll Title |
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anchor | Table_FF_Control |
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title | Connection FF Control |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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OUTPUT to SoM | Signal INPUT | Function | Notes |
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rgpio_in_data_i(23) | FFA_MPRS | Module present | aktive low | rgpio_in_data_i(22) | FFB_MPRS | Module present | aktive low | rgpio_in_data_i(21) | FFA_INTL | Interrupt output | Open collector output driven low when an Interrupt occurs. | rgpio_in_data_i(20) | FFB_INTL | Interrupt output | Open collector output driven low when an Interrupt occurs. |
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PCIE
The PCIexpress signal "PERST#" is forwarded to the SoM using RGPIO port: rgpio_in_data_i(11) <= PCIE_PERST;
JTAG MUX
The folowing table summarizes the JTAG MUX. Only FMC and SoM JTAG have to be handled in the CPLD explicitly. Discrimination between Module CPLD and Module SOC/FPGA are done via hard connected dip switch. Same is true for TEF1002 CPLD MAX10.
Scroll Title |
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anchor | Table_JTAG |
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title | JTAG selection |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | JTAGEN S2-4 | M_JTAGEN S2-5 | FMC_JTAG S2-6 |
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CPLD MAX 10 | OFF | DNC | DNC |
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4x5 SoM CPLD | ON | OFF | OFF |
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4x5 SoC/FPGA | ON | ON | OFF |
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FMC | ON | DNC | ON |
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Module control
The module control signals are connected to dip switches:
Scroll Title |
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anchor | Table_SoM_Control |
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title | Connection SoM Control |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal OUTPUT to SoM | Signal INPUT | Function | Notes |
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EN1 | CM0 | SoM enable power | "high" when Dip ON. See SoM TRM for further description. | NOSEQ | CM1 | disable SoM powerseq | "high" when Dip ON. See SoM TRM for further description. | MODE | CM2 | SoM Bootmode | "high" when Dip ON. See SoM TRM for further description. |
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RESET
The push button signal is connected to the RESIN signal of the SoM (low active reset).
I2C and MUX
The SEL vector is used to select different I2C devices:
Scroll Title |
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anchor | Table_I2C_SoM |
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title | Connection I2C to SoM |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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device | SEL | Notes |
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SFPA | 00 |
| FMC | 01 |
| FFA | 10 | also used for FFA_MSEL | FFB | 11 | also used for FFB_MSEL |
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A "three wire" I2C interface is used to connect the CPLD I2C to the SoM:
Scroll Title |
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anchor | Table_I2C_SoM |
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title | Connection I2C to SoM |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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VHDL Port name | Direction | SC CPLD Pin | Connected to | Function | Notes |
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A_00_N | IN | J10 | JB1, pin 38 | SDA IN | "three wire" I2C | A_00_P | IN | K10 | JB1, pin 36 | SCL IN | "three wire" I2C | A_01_P | OUT | K11 | JB1, pin 37 | SDA OUT | "three wire" I2C |
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The devices SDA are driven in the following way: DEVICE_XY_SDA <= '0' when SEL= "XY" and A_00_N='0' else 'Z';
The SDA to the SoM is generated by the logical AND connection of all devices: SDAs <= (SFPA_SDA AND FMC_SDA AND FFA_SDA AND FFB_SDA )
Scroll Title |
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anchor | Table_SC_I2C_MUX |
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title | SC I2C MUX ports |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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VHDL Port name | Direction | SC CPLD Pin | Connected to | Function | Notes |
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FMC_SCL | OUT | J8 | J1, pin C31 | I2C 2-wire serial bus | MUX in CPLD | FMC_SDA | INOUT | F9 | J1, pin C30 | FFA_MSEL | OUT | C9 | J13, pin 4 | Select attached FF Module | Pull low to use I2C | FFA_SCL | OUT | D6 | J13, pin 8 | I2C 2-wire serial bus | MUX in CPLD | FFA_SDA | INOUT | E6 | J13, pin 7 | FFB_MSEL | OUT | B10 | J18, pin 4 | Select attached FF Module | Pull low to use I2C | FFB_SCL | OUT | D8 | J18, pin 8 | I2C 2-wire serial bus | MUX in CPLD | FFB_SDA | INOUT | A9 | J18, pin 7 | A_01_P | OUT | K11 | JB1, pin 37 | SDA OUT | "three wire" I2C | A_06_N | IN | G12 | JB1, pin 49 | I2C GPIO MUX 0 | I2C MUX also used for FireFlys MSEL | A_07 | IN | L13 | JB1, pin 34 | I2C GPIO MUX 1 |
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PHY LEDs
As soon as the module M3_3VOUT is ready the following signals are used to drive the PHY LEDs.
Scroll Title |
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anchor | Table_PHY_LEDs |
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title | Connection of PHY LEDs |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | VHDLname | Function | Notes |
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CPLD_IO_1 | PHY_LED1 | drive LED | Connected to JB1-88 | net_gnd | PHY_LED1R | select color | yellow | CPLD_IO_2 | PHY_LED2 | drive LED | Connected to JB1-92 | net_gnd | PHY_LED2R | select color | green |
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RGPIO
The RGPIO is for communiction betweenn SoC and SC CPLD it handels the signals:
Scroll Title |
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anchor | Table_RGPIO |
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title | Signals handeld by RGPIO |
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|
Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Signal | VHDLname | Function | Notes |
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SOC read (11) | PCIE_PERST | Indication that PCIe Bus is up (power, clocks) |
| SoC write (17) | EN_FMC | Enable switched 3.3V FMC power | pulled down | SoC write (15) | PWR_EN_Signal | Enable perepherie power 3V3_PER | used for EN_PER | SOC read (15) | FMC_PRSNT_M2C_L | Indicate if FMC installed | Low when FMC present | SoC write (16) | FMC_PWR_set | Turn on FMC Power | used for EN_FMC_VADJ and FAN_FMC_EN | SOC read (14) | PG_FMC_VADJ | Indicate FMC VADJ power is up |
| SoC write (23) | FF_RSTL | Reset configuration | Both FF are resetted simultanously when pulled LOW | SOC read (21) | FFA_INTL | Indicate interrrupt | LOW when fault condition, pulled up | SOC read (13) | FFA_MPRS | Indicate FF Module installed | LOW when Module present, pulled up | SOC read (20) | FFB_INTL | Indicate interrrupt | LOW when fault condition, pulled up | SOC read (22) | FFB_MPRS | Indicate FF Module installed | LOW when Module present, pulled up | SOC read (17) | SFPA_LOS | SFP signal loss | HIGH indicates signal loss | SOC read (18) | SFPA_M-DEF0 | SFP modul absent | HIGH when module physically absent | SoC write (21) | SFPA_RS0 | SFP rate select RX | LOW for 1000BASE-SX, HIGH for 10GBASE-SR | SoC write (20) | SFPA_RS1 | SFP rate select TX | LOW for 1000BASE-SX, HIGH for 10GBASE-SR | SoC write (22) | SFPA_TX_DIS | SFP transmitter disable | HIGH disables transmitter | SOC read (19) | SFPA_TX_FAULT | Indicates SFP laser fault | HIGH indicates fault | SoC write (19) | LED1 | user LEDs |
| SoC write (18) | LED2 |
|
Scroll Title |
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anchor | Table_RGPIO_SoM |
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title | Connection RGPIO to SoM |
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|
Scroll Table Layout |
---|
orientation | portrait |
---|
sortDirection | ASC |
---|
repeatTableHeaders | default |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
VHDL Port name | Direction | SC CPLD Pin | Connected to | Function | Notes |
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A_01_N | OUT | L12 | JB1, pin 35 | TX data |
| A_02_N | IN | J12 | JB1, pin 41 | RX CLK |
| A_02_P | IN | K12 | JB1, pin 39 | RX data |
|
|
USR LED
User LEDs are accesible via RGPIO:
Scroll Title |
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anchor | Table_User_LEDs |
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title | Connection of User LEDs |
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|
Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
---|
sortByColumn | 1 |
---|
sortEnabled | false |
---|
cellHighlighting | true |
---|
|
Signal | VHDLname | Function | Notes |
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SoC write(19) | LED1 | - | user defined | SoC write(18) | LED2 | - | user defined |
|
...
LOW when fault condition, pulled up
...
Appx. A: Change History and Legal Notices
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