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Content

For general structure and of the reference design, see Project Delivery - Intel devices

Design Sources

Prebuilt

Download

Reference Design is only usable with the specified Quartus version. Do never use different Versions of Quartus Software for the same Project.

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1. Open file "test_board.quar"
2. Select Tools → Platform Designer  from Quartus menu
3. Open file "NIOS_test_board.qsys" in Platform Designer
4. Open the component "onchip_ram" (double-click)
   1. Enable "Initialize memory content" and "Enable non-default initialization file" at Memory initialization, if disabled
   2. Specify Path for User created initialization file. You can find the file at \software\test_board\mem_init\NIOS_test_board_onchip_ram.hex
5. Select Generate → Generate HDL... from the Platform Designer menu

6. The Generation window will appear

   1. Select "VHDL" as the synthesis language and "None" from the simulation model dropdown menu

   2. Select “Create block symbol file(.bsf)”, if not selected

   3.  Click Generate and close Platform Designer
7. Select Processing → Start Compilation from the Quartus menu to compile the Design

Launch

Programming

JTAG

Trenz Electronic provides a tcl based built environment based on Quartus Design Flow.

See also:

• Project Delivery - Intel devices

The Trenz Electronic FPGA Reference Designs are TCL-script based projects. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS.

TE Scripts are only needed to generate the quartus project, all other additional steps are optional and can also executed by Intel  Quartus/SDK GUI.

1. Open _create_win_setup.cmd and follow instructions on shell:
2. Press 0 and enter to start "Module Selection Guide"
3. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
   
   1. (optional for manual changes) Select correct device and Quartus install path on "design_basic_settings.cmd" and create Quartus project with "quartus_create_project_batchmode.cmd"

Launch

Programming

JTAG

Not used on this Example.

MAX10 Flash

1. Connect the Module to USB-Port
2. Open Quartus project with "quartus_open_existing_project_guimode.cmd"Connect the Module to USB-Port
3. Open the Quartus Prime Programmer from Tools → Programmer
4. If the Arrow-USB-Blaster is not visible:
   1. Click "Hardware Setup..."
   2. Choose at the drop-down menu "Currently selected hardware" Arrow-USB-Blaster[USB0]
   3. Close "Hardware Setup"
5. If the correct configuration file is not set:
   1. Delete other files
   2. Click "Add file..."
   3. select Select the correct * .sof pof file (Pathcreated project file: <project_directory>\<design_name>/quartus/output_files\/test_board.sof)
6. Click start

MAX10 Flash

1. Do step 1 to step 3 from section Programming → JTAG, if not done yet
2. If the correct configuration file is not set:
   1. Delete other files
   2. Click "Add file..."Select the correct *.pof file (Path: <project_directory>\output_files\test_boardpof or prebuilt file: <design_name>/prebuilt/<board_part_short_name>/programming_files/*.pof)
3. Click start"Start"

Usage

1. Prepare Hardware like described on section Programming
2. Connect UART USB (most cases same as JTAG)

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1. Open Serial Console "PuTTY"
2. Change settings in category "Session"
   
   1. Connection Type: Serial
   2. COM Port: see device manager (Win OS)
   3. Speed: 115200
3. Select "Implicit CR in every LF" in category "Terminal"
4. Click Open
5. Press reset button at module
   
   1. SDRAM test is running
   2. Flash test is running
6. After the tests test finished, you can toggle between following LED sequences by pressing user button
   1. Spirit level
   2. Case statement sequence
   3. Shift register sequence
   4. Knightrider sequence
   5. Pulse-width modulation sequence

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