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USB PHY is provided by Microchip USB3320. The ULPI interface is connected to the Zynq PS USB0. I/O voltage is fixed at 1.8V. Reference clock input for the USB PHY is supplied by the on-board 2552.000000 MHz oscillator (U15U14).
USB PHY connection
PHY Pin | ZYNQ Pin | B2B Name | Notes |
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ULPI | MIO52..63 | - | Zynq USB0 MIO pins are connected to the USB PHY. |
REFCLK | - | - | 52.000000 MHz from on-board oscillator (U14). |
REFSEL[0..2] | - | - | Reference clock frequency select, all set to GND selects 52.000000 MHz. |
RESETB | MIO25 | - | Active low reset. |
CLKOUT | MIO52 | - | Connected to 1.8V, selects reference clock operation mode. |
DP, DM | - | OTG_D_P, OTG_D_N | USB data lines routed to B2B connector JM3 pins 47 and 49. |
CPEN | - | VBUS_V_EN | External USB power switch active high enable signal, routed to JM3 pin 17. |
VBUS | - | USB_VBUS | Connect to USB VBUS via a series of resistors, see reference schematics, routed to JM3 pin 55. |
ID | - | OTG_ID | For an A-device connect to ground, for a B-device left floating. routed from JM3 pin 23. |
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2019-10-30 | v.80 | John Hartfiel |
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2019-09-17 | v79 | Martin Rohrmüller |
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2019-07-17 | v.78 | Martin Rohrmüller |
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2019-05-08 | v.77 | John Hartfiel |
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2018-11-12 | v.74 | John Hartfiel |
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2018-08-30 | v.73 | John Hartfiel |
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2018-07-12 | v.69 | Ali Naseri |
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2018-06-11 | v.61 | John Hartfiel |
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2018-03-12 | v.54 |
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2017-11-20 | v.51 | John Hartfiel |
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2017-11-10 | v.50 | John Hartfiel |
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2017-10-18 | v.49 | John Hartfiel |
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2017-09-25 | v.48 | John Hartfiel |
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2017-09-18 | v.47 | John Hartfiel |
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2017-08-30 | v.46 | Jan Kumann |
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2017-08-24 | v.36 | John Hartfiel |
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2017-08-21 | v.34 | John Hartfiel |
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2017-08-21 | v.33 | Jan Kumann |
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| v.7 | John Hartfiel |
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2017-08-07 | v.5 | Jan Kumann |
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