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anchor | Figure_OV_BD |
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title | CR00140 block diagram |
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draw.io Diagram |
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border | true |
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viewerToolbar | true |
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fitWindow | false |
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diagramName | BD_CR00140 |
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simpleViewer | false |
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width | |
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diagramWidth | 650 |
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revision | 1114 |
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Main Components
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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JTAG Signal | B2B Connector | Pin header | Notes |
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TMS | J9-55 | J10-5 | pull up | TDI | J9-51 | J10-9 | pull up | TDO | J9-53 | J10-3 |
| TCK | J9-59 | J10-1 | pull down | JTAG_EN | J9-57 | - | pull up |
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On-board Peripherals
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Sensor Interface
The pin headers J1, J2 and J3 constitute the sensor interface. It can be e.g. used with Encoders or Hall sensores. J3 is the selector between differential sensor interface (J2) or single ended sensors (J1). Connecting sensors is only allowed to one of the two pinheaders, the other one has to stay unconnected. In the figure below the jumper configuration of J3 to enable one or the other type of sensor interface is depicted.
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anchor | Figure_OV_Jumpers |
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title | CR00140 Jumpers |
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draw.io Diagram |
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border | true |
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viewerToolbar | true |
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fitWindow | false |
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diagramName | CR00140_Jumper |
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simpleViewer | false |
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width | |
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diagramWidth | 242 |
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revision | 6 |
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Image Added |
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The pinheaders are for connection of the sensors are further described in the following table. For differential configuration 100 Ohm parallel termination is used.
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anchor | Table_SIP_Sensors |
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title | Sensor pins connection |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | Pin J1 (singel ended) | Pin J2 (differential) |
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ISO_ENC_A_P | 3 | 6 | ISO_ENC_A_N | - | 5 | ISO_ENC_B_P | 5 | 8 | ISO_ENC_B_N | - | 7 | ISO_ENC_I_P | 2 | 10 | ISO_ENC_I_N | - | 9 | DGND | 4 | 3 | +5.0V_D | 1, 6 | 2 |
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On-board Peripherals
Page properties |
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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CPLD
A Intel/Altera MAX10 FPGA 10M08SAU169C8G is used as system controller. Table below lists the SC CPLD I/O signals and pins:
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal name | SC CPLD Pin | Connected to | Function | Notes |
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LEDs
Scroll Title |
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Color | Connected to | Signal name | Active Level | Note |
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D1 | green | U25-B2 | LED1 | high | User LED, CPLD Firmware dependent, see Firmware description. | D2 | green | U25-D6 | LED0 | high | User LED, CPLD Firmware dependent, see Firmware description. | D3 | green | U1-A3, U2-B1 | PGOOD | high | ON when +15.0V_M and +5.0V_M regulator indicated power good. Connected via transistor T1. | D4 | green | DC_LINK | - | low | ON when DC_LINK above 11.7V. Connected via comparator U14D to DC_LINK |
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Scroll Title |
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Connected to | Signal name | Active Level | Note |
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S1 | U25-B10 | BUTTON2 | low | User button, CPLD Firmware dependent, see Firmware description | S2 | U25-C10 | BUTTON1 | low | User button, CPLD Firmware dependent, see Firmware description |
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BEMF
Power and Power-On Sequence
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