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Template Revision 2.4 7 - on construction

Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board"

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DateVivadoProject BuiltAuthorsDescription
2020-01-142019.2TE0720-test_board-vivado_2019.2-build_3_20200114090828.zip
TE0720-test_board_noprebuilt-vivado_2019.2-build_3_20200114090837.zip
John Hartfiel
  • Vitis script updates (include linux domain and prebuilt linux files for vitis)
  • prebuilt binary export on selection guide
2019-12-182019.2TE0720-test_board-vivado_2019.2-build_1_20191218151902.zip
TE0720-test_board_noprebuilt-vivado_2019.2-build_1_20191218152732.zip
John Hartfiel
  • 2019.2 update
  • Vitis support
2019-03-042018.3TE0720-test_board-vivado_2018.3-build_01_20190304100745.zip
TE0720-test_board_noprebuilt-vivado_2018.3-build_01_20190304100755.zip
John Hartfiel
  • update for -1CR version only (256MB DDR3)
2019-02-212018.3TE0720-test_board-vivado_2018.3-build_01_20190221125123.zip
TE0720-test_board_noprebuilt-vivado_2018.3-build_01_20190221125133.zip
John Hartfiel
  • TE Script update
  • rework of the FSBLs
  • some additional Linux features
2018-08-232018.2

te0720-test_board-vivado_2018.2-build_03_20180823185142.zip
te0720-test_board_noprebuilt-vivado_2018.2-build_03_20180823185158.zip

John Hartfiel
  • DDR setup bugfix for l1if only
2018-08-132018.2te0720-test_board-vivado_2018.2-build_02_20180810162024.zip
te0720-test_board_noprebuilt-vivado_2018.2-build_02_20180810162040.zip
John Hartfiel
  • 2018.2 update
  • Boart Part Files rework
2018-04-262017.4te0720-test_board-vivado_2017.4-build_07_20180426144351.zip
te0720-test_board_noprebuilt-vivado_2017.4-build_07_20180426144405.zip
John Hartfiel
  • new assembly variant
2018-03-122017.4te0720-test_board_noprebuilt-vivado_2017.4-build_06_20180312152408.zip
te0720-test_board-vivado_2017.4-build_06_20180312152419.zip
John Hartfiel
  • add assembly variant
  • script update
2018-01-092017.4te0720-test_board_noprebuilt-vivado_2017.4-build_02_20180109121313.zip
te0720-test_board-vivado_2017.4-build_02_20180109121300.zip
John Hartfiel
  • no design changes
  • set EEPROM MAC with FSBL+u-boot
  • FSBL for QSPI Programming
2017-11-272017.2te0720-test_board_noprebuilt-vivado_2017.2-build_05_20171127153028.zip
te0720-test_board-vivado_2017.2-build_05_20171127153006.zip
John Hartfiel
  • remove duplicated content
2017-11-202017.2te0720-test_board_noprebuilt-vivado_2017.2-build_05_20171122074701.zip
te0720-test_board-vivado_2017.2-build_05_20171122074646.zip
John Hartfiel
  • initial release


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SoftwareVersionNote
Vitis2019.2

needed, Vivado is included into Vitis installation

PetaLinux2019.2needed


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  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter to start "Module Selection Guide"
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
    1. (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see also TE Board Part Files
  5. Create XSA and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported XSA
    1. XSA is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\<ddr size>" or "prebuilt\os\petalinux\<short name>"
      Notes: Scripts select "prebuilt\os\petalinux\<short name>", if exist, otherwise "prebuilt\os\petalinux\<DDR size>" of the selected device
  8. Generate Programming Files with Vitis
    • Run on Vivado TCL: TE::sw_run_vitis -all
      Note: Depending of PC performance this can take several minutes. Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv" and open Vitis
    • (alternative) Start Vitis with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_vitis
      Note:  TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis

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Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and DebuggingXilinx Software Programming and Debugging

Get prebuilt boot binaries

  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell
  2. Press 0 and enter to start "Module Selection Guide"
    1. Select assembly version
    2. Validate selection
    3. Select Create and open delivery binary folder
      Note: Folder (<project foler>/_binaries_<Artikel Name>) with subfolder (boot_<app name>) for different applications will be generated

QSPI

Optional for Boot.bin on QSPI Flash and image.ub on SD.

  1. Connect JTAG and power on carrier with module
  2. Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
  3. Type on Vivado TCL Console: TE::pr_program_flash_binfile -swapp u-boot
    Note: To program with SDK/Vivado GUI, use special FSBL (zynq_fsbl_flash) on setup
             optional "TE::pr_program_flash_binfile -swapp hello_te0720" possible
  4. Copy image.ub on SD-Card
    1. use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
    2. or use prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
  5. Insert SD-Card

SD

  1. Copy image.ub and Boot.bin on SD-Card.
    • For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
  2. Set Boot Mode to SD-Boot.
    • Depends on Carrier, see carrier TRM.
  3. Insert SD-Card in SD-Slot.

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DateDocument RevisionAuthorsDescription

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modified-date
modified-date
dateFormatyyyy-MM-dd

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current-version
current-version
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modified-user
modified-user

  • Vitis script updates (include linux domain and prebuilt linux files for vitis)
  • prebuilt binary export on selection guide
2019-12-19v.36John Hartfiel
  • 2019.2 release
2019-12-03v.34John Hartfiel
  • bugfix document link
2019-10-28v.33John Hartfiel
  • removed remove instructions that are no longer used

2019-05-07

v.31John Hartfiel
  • Some FSBL notes
  • wrong link
2019-03-06v.28John Hartfiel
  • Fixed prebuilt issue for TE0720-03-1CR
2019-03-01v.27John Hartfiel
  • Known issue for TE0720-03-1CR linux design

2019-02-21

v.26John Hartfiel
  • 2018.3 release finished (include design reworks)
2018-08-30v.25John Hartfiel
  • update documentation PS configuration

2018-08-23

v.24

John Hartfiel
  • update l1if boart parts

2018-08-13

v.23John Hartfiel
  • 2018.4 release

2018-04-26

v.22John Hartfiel
  • add assembly variant
2018-02-20v.20John Hartfiel
  • small documentation update
2018-01-09v.16John Hartfiel
  • Release 2017.4
  • Documentation update
2017-11-27v.14John Hartfiel
  • Typo correction
  • Design Files update
2017-11-22v.12John Hartfiel
  • Update HW list
2017-11-22

v.11

John Hartfiel
  • Release 2017.2
2017-11-20v.1

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created-user

  • Initial release
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modified-users

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