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FPGA IO BANK 5 - D1 ... D11 ?!?!?
Recommended Operating Conditions !?!?!?! - Siehe BOM
CLK12M Connected to FPGA Bank 2, pin H6.
TEI0015
Bit or Byte ausschreiben
FTDI Busse prüfen
ADC EN prüfen
Power Supply (max. Current)
Revision Nummer
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Make Links:-------------------------------------------------------------------------
Overview - Link to Recources
Currently Offered Variants - Linke to product page
Revision History - Document Link
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The Trenz Electronic TEI0023 is a commercial-grade, low cost and small size module integrated with Intel® MAX 10. Intel MAX 10 devices are the ideal solution for system management, I/O expansion, communication control planes, industrial, automotive, and consumer applications.
Refer to httpshttp://wiki.trenz-electronic.de/display/PD/TEI0023+Resourcesorg/tei0023-info for the current online version of this manual and other available documentation.
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Intel® MAX 10 Commercial [10M08SAU169C8G]
SDRAM Memory up to 64Mb64 Mbyte, 166MHz
Dual High Speed USB to Multipurpose UART/FIFO IC
64 Mb Mbit Quad SPI Flash - Not on all variants
4Kb 4 Kbit EEPROM Memory
8x User LED
Micro USB2 Receptacle 90
18 Bit 2 MSPS Analog to Digital Converter
2x SMA Female Connector
I/O interface: 23x GPIO
Power Supply: 5V
Dimension: 86.5mm x 25mm
- Fully-Differential Programmable-Gain Instrumentation Amplifier
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Scroll Title |
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anchor | Table_OBP_FTDI |
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title | FTDI chip interfaces and pins |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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FTDI Chip U3 Pin | Signal Schematic Name | Connected to | Notes |
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ADBUS0 | TCK | FPGA bank 1B, pin G2 | JTAG interface | ADBUS1 | TDI | FPGA bank 1B, pin F5 | ADBUS2 | TDO | FPGA bank 1B, pin F6 | ADBUS3 | TMS | FPGA bank 1B, pin G1 | BDBUS0 | BDBUS0 | FPGA bank 8, pin A4 | User configurable | BDBUS1 | BDBUS1 | FPGA bank 8, pin B4 | User configurable | BDBUS2 | BDBUS2 | FPGA bank 8, pin B5 | User configurable | BDBUS3 | BDBUS3 | FPGA bank 8, pin A6 | User configurable | BDBUS4 | BDBUS4 | FPGA bank 8, pin B6 | User configurable | , pin G1 | BDBUS0 | BDBUS0 | FPGA bank 8, pin A4 | User configurable | BDBUS1 | BDBUS1 | FPGA bank 8, pin B4 | User configurable | BDBUS2 | BDBUS2 | FPGA bank 8, pin B5 | User configurable | BDBUS3 | BDBUS3 | FPGA bank 8, pin A6 | User configurable | BDBUS4 | BDBUS4 | FPGA bank 8, pin B6 | User configurable | BDBUS5 | BDBUS5 | FPGA bank 8, pin A7 | User configurable | BDBUS6 | BDBUS6 | FPGA bank 6, pin C11 | User configurable | BDBUS7 | BDBUS7 | FPGA bank 3, pin J7 | User configurable | BCBUS0 | BCBUS0 | FPGA bank 5, pin J9 | User configurable | BCBUS1 | BCBUS1 | FPGA bank 3, pin K5 | User configurable | BCBUS2 | BCBUS2 | FPGA bank 3, pin L4 | User configurable | BCBUS3 | BCBUS3 | FPGA bank 3, pin L5 | User configurable | BCBUS4 | BCBUS4 | FPGA bank 3, pin N12 | BDBUS5 | BDBUS5 | FPGA bank 8, pin A7 | User configurable |
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SPI Flash
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Power supply with minimum current capability of xx A 1A for system startup is recommended.
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Scroll Title |
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anchor | Table_PWR_PR |
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title | Module power rails. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Power Rail Name | Connector J2 Pin | Connector J9 Pin | Direction | Notes |
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VIN | J2-13 | - | Input | 5 V - Pin Header | 3.3V | J2-12 | - | Output |
| 5V | J2-14 | - | Output |
| USB_VBUS | - | J9-1 | Input | 5 V - USB Connector |
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Module power rails.
Bank Voltages
Scroll Title |
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anchor | Table_PWR_BV |
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title | MAX10 Bank Voltages. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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| Schematic Name | | Notes |
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Bank 1A | VCCIO1A | 3.3V |
| Bank 1B | VCCIO1B | 3.3V |
| Bank 2 | VCCIO2 | 3.3V |
| Bank 3 | VCCIO3 | 3.3V |
| Bank 5 | VCCIO5 | 3.3V |
| Bank 6 | VCCIO6 | 3.3V |
| Bank 8 | VCCIO8 | 3.3V |
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Intel MAX 10 SoC bank voltages.
Technical Specifications
Absolute Maximum Ratings
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anchor | Table_TS_AMR |
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title | Absolute Maximum Ratings |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Description | Min | Max | Unit | Reference Document |
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VIN | Supply voltage | 4.75 | 5.25 | V |
| CH1-, CH1+ | Analog input voltage on amplifier U12 pin 1, 10 | -20 | 20 | V | LTC6373 datasheet | T_STG | Storage Temperature | -2565 | +85125 | °C |
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Recommended Operating Conditions
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Scroll Title |
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anchor | Table_TS_ROC |
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title | Recommended operating conditions. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Min | Max | Unit | Reference Document |
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VIN supply voltage (5.0V nominal) | 4.75 | 5.25 | V |
| Analog input voltage on amplifier U12 pin 1 (CH1-), 10 (CH1+) | -10 | 10 | V | LTC6373 datasheet | T_OP | 0 | +7085 | °C | W9864G6JT-6 datasheet Part W74M64FVSSIQ DataSheet W74M64FV 10M08SAU169C8G datasheet |
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Physical Dimensions
Module size: 25 mm × 86.5 mm. Please download the assembly diagram for exact numbers.
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Scroll Title |
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anchor | Table_VCP_SO |
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title | Trenz Electronic Shop Overview |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Revision History
Hardware Revision History
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