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Template Revision 2.6 8 - on construction Design Name always "TE Series Name" + Design name, for example "TE0720 Test Board" |
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Hardware
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Reference Design is available on:
Design Flow
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- _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
- Press 0 and enter to start "Module Selection Guide"
- (optional Win OS) Generate Virtual Drive or use short directory for the reference design (for example x:\<design name>)
- Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
- (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
Note: Select correct one, see TE Board Part Files
- (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
- Create HDF and export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
- Run on Vivado TCL: TE::hw_build_design -export_prebuilt
- Create Linux (uboot.elf and image.ub) with exported HDFXSA
- HDF XSA is exported to "prebuilt\hardware\<short name>"
Note: HW Export from Vivado GUI create another path as default workspace. - Create Linux images on VM, see PetaLinux KICKstart
- Use TE Template from /os/petalinuxNote: run init_config.sh before you start petalinux config. This will set correct temporary path variable.
- For 128MB and 64MB only:Netboot Offset must be reduced manually, see Config
- HDF XSA is exported to "prebuilt\hardware\<short name>"
- Add Linux files (uboot.elf and image.ub) to prebuilt Add Linux files (uboot.elf and image.ub) to prebuilt folder
- "prebuilt\os\petalinux\<ddr size>" or "prebuilt\os\petalinux\<short name>"
- Generate Programming Files with HSI/SDKVitis
- Run on Vivado TCL: TE::sw_run_hsivitis -all
Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv" - (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_sdkvitis
Note: See SDK Projects TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis
- Run on Vivado TCL: TE::sw_run_hsivitis -all
Launch
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Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging
QSPI
Get prebuilt boot binaries
- _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell
- Press 0 and enter to start "Module Selection Guide"
- Select assembly version
- Validate selection
- Select Create and open delivery binary folder
Note: Folder (<project foler>/_binaries_<Artikel Name>) with subfolder (boot_<app name>) for different applications will be generated
QSPI
- Connect JTAG and power Connect JTAG and power module (TE0726 can be powered via JTAG USB or external)
- Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
- Type on Vivado TCL Console: TE::pr_program_flash_binfile -swapp u-boot
Note: To program with SDK/Vivado GUI, use special FSBL (zynqmp_fsbl_flash) on setup
optional "TE::pr_program_flash_binfile -swapp hello_te0726" possible - Copy image.ub on SD-Card
- use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
- or use
- For correct prebuilt file location, see <design_name>/prebuilt/readme_file_location.txtreadme_file_location.txt
- Important: Do not copy Boot.bin on SD(is not used see SD note), only other files.
- Insert SD-Card
SD
Xilinx Zynq devices in CLG225 package do not support SD Card boot directly from ROM bootloader. Use QSPI for primary boot and SD for secondary boot (uboot)
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Design specific constrain
Software Design -
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Vitis
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For SDK project creation, follow instructions from:SDK Projects
Application
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---------------------------------------------------------- FPGA Example scuMCS Firmware to configure SI5338 and Reset System. srec_spi_bootloaderTE modified 20182019.3 2 SREC Bootloader to load app or second bootloader from flash into DDR Descriptions:
xilisf_v5_11TE modified 20182019.3 2 xilisf_v5_11
---------------------------------------------------------- Zynq Example: zynq_fsblTE modified 20182019.3 2 FSBL General:
Module Specific:
zynq_fsbl_flashTE modified 20182019.3 2 FSBL General:
ZynqMP Example: ---------------------------------------------------------- zynqmp_fsblTE modified 20182019.3 2 FSBL General:
Module Specific:
zynqmp_fsbl_flashTE modified 20182019.3 2 FSBL General:
zynqmp_pmufwXilinx default PMU firmware. ---------------------------------------------------------- General Example: hello_te0820Hello TE0820 is a Xilinx Hello World example as endless loop instead of one console output. u-bootU-Boot.elf is generated with PetaLinux. SDK/HSI Vitis is used to generate Boot.bin. |
Template location: ./sw_lib/sw_apps/
zynq_fsbl
TE modified 20182019.3 2 FSBL
General:
- Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\
- General Changes:
- Display FSBL Banner and Device ID
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zynq_fsbl_flash
TE modified 20182019.3 2 FSBL
General:
- Modified Files: main.c
- General Changes:
- Display FSBL Banner
- Set FSBL Boot Mode to JTAG
- Disable Memory initialisation
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CONFIG_ENV_IS_NOWHERE=y
# CONFIG_ENV_IS_IN_SPI_FLASH is not set
Change platform-top.h:
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Device Tree
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/include/ "system-conf.dtsi" / { }; /* USB PHY */ /{ usb_phy0: usb_phy@0 { compatible = "ulpi-phy"; #phy-cells = <0>; reg = <0xe0002000 0x1000>; view-port = <0x0170>; drv-vbus; }; }; &usb0 { dr_mode = "host"; //dr_mode = "peripheral"; usb-phy = <&usb_phy0>; }; /* I2C1 */ &i2c1 { #address-cells = <1>; #size-cells = <0>; i2cmux0: i2cmux@70 { compatible = "nxp,pca9544"; #address-cells = <1>; #size-cells = <0>; reg = <0x70>; i2c1@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; id_eeprom@50 { compatible = "atmel,24c32"; reg = <0x50>; }; }; i2c1@1 { // Display Interface Connector #address-cells = <1>; #size-cells = <0>; reg = <1>; }; i2c1@2 { // HDMI Interface Connector #address-cells = <1>; #size-cells = <0>; reg = <2>; }; i2c1@3 { // Camera Interface Connector #address-cells = <1>; #size-cells = <0>; reg = <3>; }; }; }; |
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