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Overview

Zynq PS Design with Linux Example.
Refer to http://trenz.org/te0726-info for the current online version of this manual and other available documentation.

Key Features

  • Vitis/Vivado 2019.2
  • PetaLinux
  • SD
  • ETH
  • USB
  • I2C
  • Special FSBL for QSPI programming

Revision History

DateVivadoProject BuiltAuthorsDescription
2020-04-082019.2TE0726-test_board_noprebuilt-vivado_2019.2-build_10_20200408185842.zip
TE0726-test_board-vivado_2019.2-build_10_20200408185804.zip
Mohsen Chamanbaz/John Hartfiel
  • changes FSBL flash
2020-03-252019.2TE0726-test_board_noprebuilt-vivado_2019.2-build_8_20200325080535.zip
TE0726-test_board-vivado_2019.2-build_8_20200325080528.zip
Mohsen Chamanbaz/John Hartfiel
  • script update
2020-02-142019.2TE0726-test_board_noprebuilt-vivado_2019.2-build_5_20200214091531.zip
TE0726-test_board-vivado_2019.2-build_5_20200214091442.zip
Mohsen Chamanbaz
  • Update to 19.2
  • Vitis support
  • prebuilt binary export on selection guide
2019-12-122018.3te0726-test_board_noprebuilt-vivado_2018.3-build_10_20191211160322.zip
te0726-test_board-vivado_2018.3-build_10_20191211160314.zip
Mohsen Chamanbaz
  • FSBL update to18.3
  • additional linux apps
2018-07-132018.2te0726-test_board_noprebuilt-vivado_2018.2-build_02_20180713155548.zip
te0726-test_board-vivado_2018.2-build_02_20180713155535.zip
John Hartfiel
  • Changed SDK Notes on FSBL template fro Flash programming
2018-07-112018.2te0726-test_board_noprebuilt-vivado_2018.2-build_02_20180711113737.zip
te0726-test_board-vivado_2018.2-build_02_20180711113722.zip
John Hartfiel
  • change note for REV01
  • no design changes
2018-02-172017.4te0726-test_board-vivado_2017.4-build_08_20180517084735.zip
te0726-test_board_noprebuilt-vivado_2017.4-build_08_20180517084604.zip
John Hartfiel
  • correction netboot offset for 128MB variant
2018-02-162017.4te0726-test_board-vivado_2017.4-build_06_20180216205357.zip
te0726-test_board_noprebuilt-vivado_2017.4-build_06_20180216205410.zip
John Hartfiel
  • correction PS REFCLK for 01 variant
2018-01-312017.4te0726-test_board-vivado_2017.4-build_05_20180131115412.zip
te0726-test_board_noprebuilt-vivado_2017.4-build_05_20180131115451.zip
John Hartfiel
  • initial release 2017.4
Design Revision History

Release Notes and Know Issues

IssuesDescriptionWorkaroundTo be fixed version
Flash Programming failed with 19.2Depending on Flash content Flash programming failed with provided fsbl_flash (Xilinx AR# 70548 )2019.2 version
  • Option1:
    • In case Flash is empty, use fsbl_flash on programming GUI 
    • In case Flash is programmed use normal fsbl on programming GUI
  • Option2: use in both case fsbl_flash on programming GUI and Vivado LabTools 2018.3
---
Known Issues

Requirements

Software

SoftwareVersionNote
Vitis2019.2needed, Vivado is included into Vitis installation
PetaLinux2019.2needed
Software

Hardware

Basic description of TE Board Part Files is available on TE Board Part Files.

Complete List is available on <design name>/board_files/*_board_files.csv

Design supports following modules:

Module ModelBoard Part Short NamePCB Revision SupportDDRQSPI FlashEMMCOthersNotes
te0726-0101REV0164MB16MBNANA
te0726-03rrREV03,REV02128MB16MBNANA
te0726-03mmREV03,REV02512MB16MBNANA
te0726-03-07s-1c7sREV03,REV02512MB16MBNANA
Hardware Modules

Design supports following carriers:

Carrier ModelNotes
---
Hardware Carrier

Additional HW Requirements:

Additional HardwareNotes
USB CableConnect to USB2 or better USB3 Hub for proper power over USB
Additional Hardware

Content

For general structure and of the reference design, see Project Delivery - Xilinx devices

Design Sources

TypeLocationNotes
Vivado<design name>/block_design
<design name>/constraints
<design name>/ip_lib
Vivado Project will be generated by TE Scripts
Vitis<design name>/sw_libAdditional Software Template for Vitis and apps_list.csv with settings automatically for Vitis app generation
PetaLinux<design name>/os/petalinuxPetaLinux template with current configuration
Design sources

Additional Sources

TypeLocationNotes
init.sh<design name>/misc/sd/Additional Initialization Script for Linux
Additional design sources

Prebuilt

File

File-Extension

Description

BIF-File*.bifFile with description to generate Bin-File
BIN-File*.binFlash Configuration File with Boot-Image (Zynq-FPGAs)
BIT-File*.bitFPGA (PL Part) Configuration File
Diverse Reports---Report files in different formats
Hardware-Platform-Specification-Files*.xsaExported Vivado Hardware Specification for Vitis and PetaLinux
LabTools Project-File*.lprVivado Labtools Project File
OS-Image*.ubImage with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
Software-Application-File*.elfSoftware Application for Zynq or MicroBlaze Processor Systems
Prebuilt files (only on ZIP with prebult content)

Download

Reference Design is only usable with the specified Vivado/SDK/PetaLinux/SDx version. Do never use different Versions of Xilinx Software for the same Project.

Reference Design is available on:

Design Flow

Reference Design is available with and without prebuilt files. It's recommended to use TE prebuilt files for first lunch.

Trenz Electronic provides a tcl based built environment based on Xilinx Design Flow.

See also:

The Trenz Electronic FPGA Reference Designs are TCL-script based project. Command files for execution will be generated with "_create_win_setup.cmd" on Windows OS and "_create_linux_setup.sh" on Linux OS.

TE Scripts are only needed to generate the vivado project, all other additional steps are optional and can also executed by Xilinx Vivado/SDK GUI.  For currently Scripts limitations on Win and Linux OS see: Project Delivery Currently limitations of functionality


  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell:
  2. Press 0 and enter to start "Module Selection Guide"
  3. (optional Win OS) Generate Virtual Drive or use short directory  for the reference design (for example x:\<design name>)
  4. Create Project (follow instruction of the product selection guide), settings file will be configured automatically during this process
    1. (optional for manual changes) Select correct device and Xilinx install path on "design_basic_settings.cmd" and create Vivado project with "vivado_create_project_guimode.cmd"
      Note: Select correct one, see TE Board Part Files
  5. Create HDF and export to prebuilt folder
    1. Run on Vivado TCL: TE::hw_build_design -export_prebuilt
      Note: Script generate design and export files into \prebuilt\hardware\<short dir>. Use GUI is the same, except file export to prebuilt folder
  6. Create Linux (uboot.elf and image.ub) with exported XSA
    1. XSA is exported to "prebuilt\hardware\<short name>"
      Note: HW Export from Vivado GUI create another path as default workspace.
    2. Create Linux images on VM, see PetaLinux KICKstart
      1. Use TE Template from /os/petalinux
  7. Add Linux files (uboot.elf and image.ub) to prebuilt folder
    1. "prebuilt\os\petalinux\<ddr size>" or "prebuilt\os\petalinux\<short name>"
  8. Generate Programming Files with Vitis
    1. Run on Vivado TCL: TE::sw_run_vitis -all
      Note: Scripts generate applications and bootable files, which are defined in "sw_lib\apps_list.csv"
    2. (alternative) Start SDK with Vivado GUI or start with TE Scripts on Vivado TCL: TE::sw_run_vitis
      Note:  TCL scripts generate also platform project, this must be done manuelly in case GUI is used. See Vitis

Launch

Programming

Check Module and Carrier TRMs for proper HW configuration before you try any design.

Xilinx documentation for programming and debugging: Vivado/SDK/SDSoC-Xilinx Software Programming and Debugging

Get prebuilt boot binaries

  1. _create_win_setup.cmd/_create_linux_setup.sh and follow instructions on shell
  2. Press 0 and enter to start "Module Selection Guide"
    1. Select assembly version
    2. Validate selection
    3. Select Create and open delivery binary folder
      Note: Folder (<project foler>/_binaries_<Artikel Name>) with subfolder (boot_<app name>) for different applications will be generated

QSPI

  1. Connect JTAG and power module (TE0726 can be powered via JTAG USB or external)
  2. Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
  3. Type on Vivado TCL Console: TE::pr_program_flash -swapp u-boot
    Note: To program with SDK/Vivado GUI, use special FSBL (zynqmp_fsbl_flash) on setup
             optional "TE::pr_program_flash -swapp hello_te0726" possible
  4. Copy image.ub on SD-Card
    • use files from (<project foler>/_binaries_<Articel Name>)/boot_linux from generated binary folder,see: Get prebuilt boot binaries
    • or use prebuilt file location, see <design_name>/prebuilt/readme_file_location.txt
    • Important: Do not copy Boot.bin on SD(is not used see SD note), only other files.
  5. Insert SD-Card

SD

Xilinx Zynq devices in CLG225 package do not support SD Card boot directly from ROM bootloader. Use QSPI for primary boot and SD for secondary boot (uboot)

JTAG

Not used on this Example.

Usage

  1. Prepare HW like described on section TE0726 Test Board#Programming
  2. Connect UART USB (most cases same as JTAG)
  3. Insert SD Card with image.ub
  4. Power On PCB
    Note: 1. Zynq Boot ROM loads FSBL from QSPI into OCM, 2. FSBL loads U-boot from QSPI into DDR, 3. U-boot load Linux from SD into DDR

Linux

  1. Open Serial Console (e.g. putty)
    1. Speed: 115200
    2. COM Port: Win OS, see device manager, Linux OS see  dmesg |grep tty  (UART is *USB1)
  2. Linux Console:
    Note: Wait until Linux boot finished For Linux Login use:
    1. User Name: root
    2. Password: root
  3. You can use Linux shell now.
    1. I2C 1 Bus type: i2cdetect -y -r 1
    2. ETH0 works with udhcpc
    3. USB: insert USB device
  4. Option Features
    1. Webserver to get access to Zynq
      1. insert IP on web browser to start web interface
    2. init.sh scripts
      1. add init.sh script on SD, content will be load automatically on startup (template included in ./misc/SD)


System Design - Vivado

Block Design

Block Design


PS Interfaces

TypeNote
DDR---
QSPIMIO
SD1MIO
I2C1MIO
UART1MIO
GPIOMIO
TTC0..1EMIO
WDTEMIO
USB0MIO, ETH over USB
USB RSTMIO
PS Interfaces

Constrains

Basic module constrains

_i_bitgen_common.xdc
#
# Common BITGEN related settings for TE0726
#
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]

set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]

Design specific constrain

Software Design - Vitis

For SDK project creation, follow instructions from:

Vitis

Application

Template location: ./sw_lib/sw_apps/

zynq_fsbl

TE modified 2019.2 FSBL

General:

  • Modified Files:main.c, fsbl_hooks.h/.c (search for 'TE Mod' on source code)
  • Add Files: te_fsbl_hooks.h/.c(for hooks and board)\n\

  • General Changes: 
    • Display FSBL Banner and Device ID

Module Specific:

  • ---

zynq_fsbl_flash

TE modified 2019.2 FSBL

General:

  • Modified Files: main.c
  • General Changes:
    •  Display FSBL Banner
    • Set FSBL Boot Mode to JTAG
    • Disable Memory initialisation

hello_te0726

Hello TE0726 is a Xilinx Hello World example as endless loop instead of one console output.

u-boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

Software Design -  PetaLinux

For PetaLinux installation and  project creation, follow instructions from:

Config

Start with petalinux-config or petalinux-config --get-hw-description

Changes:

For 64MB variant only:

  • CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x2000000

For 128MB variant only:

  • CONFIG_SUBSYSTEM_NETBOOT_OFFSET = 0x4000000

U-Boot

Start with petalinux-config -c u-boot

Changes:

  • CONFIG_ENV_IS_NOWHERE=y

    # CONFIG_ENV_IS_IN_SPI_FLASH is not set

Change platform-top.h:

Device Tree

/include/ "system-conf.dtsi"
/ {
};
 
 
/* USB PHY */
 
/{
    usb_phy0: usb_phy@0 {
        compatible = "ulpi-phy";
        #phy-cells = <0>;
        reg = <0xe0002000 0x1000>;
        view-port = <0x0170>;
        drv-vbus;
    };
};
 
&usb0 {
    dr_mode = "host";
    //dr_mode = "peripheral";
    usb-phy = <&usb_phy0>;
};
 
/* I2C1 */
 
&i2c1 {
    #address-cells = <1>;
    #size-cells = <0>;
 
    i2cmux0: i2cmux@70  {
        compatible = "nxp,pca9544";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0x70>;
 
 
        i2c1@0 {
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <0>;
 
            id_eeprom@50 {
                compatible = "atmel,24c32";
                reg = <0x50>;
            };
 
        };
        i2c1@1 {    // Display Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <1>;
        };
        i2c1@2 {    // HDMI Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <2>;
        };
        i2c1@3 {    // Camera Interface Connector
            #address-cells = <1>;
            #size-cells = <0>;
            reg = <3>;
        };
    };
 
};


Kernel

Start with petalinux-config -c kernel

Changes:

  • CONFIG_XILINX_GMII2RGMII
  • CONFIG_USB_USBNET
  • CONFIG_USB_NET_SMSC95XX
  • CONFIG_USBIP_CORE

Rootfs

Start with petalinux-config -c rootfs

Changes:

  • CONFIG_i2c-tools=y
  • CONFIG_busybox-httpd=y (for web server app)
  • CONFIG_packagegroup-petalinux-utils

Applications

startup

Script App to load init.sh from SD Card if available.

See: \os\petalinux\project-spec\meta-user\recipes-apps\startup\files

webfwu

Webserver application accemble for Zynq access. Need busybox-httpd

Additional Software

No additional software is needed

Appx. A: Change History and Legal Notices

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

DateDocument Revision

Authors

Description

  • typo

2020-04-08

v.16John Hartfiel
  • Design update
  • Programming issue note
2020-03-25v.14John Hartfiel
  • script update
2020-02-19v.13Mohsen Chamanbaz
  • 2019.2 release
  • docu update

2019-12-13

v.12

John Hartfiel

  • 2018.3 release
2018-07-13v.11John Hartfiel
  • 2018.2 release

2018-05-17

v.9John Hartfiel
  • bugfix design for 128MB variant

2018-03-20

v.8John Hartfiel
  • Link update
  • remove typo
2018-02-16v.6John Hartfiel
  • Design update
2018-02-09v.5John Hartfiel
  • 2017.4 release
--all--
Document change history.

Legal Notices

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Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

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Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

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REACH, RoHS and WEEE

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WEEE

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Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

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