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The whole design process needs several tools, whereby output files and folders from one step are essential for the next processing step. Therefore, each step can be handled independently with its complexity if the needed files and folders are available. The usage of tools will be described in sequential order, according to the necessary path, booting the HPS. This process is described by showing the requirements in the next section. The following section displays the necessary steps withing the tool "Intel Quartus Prime Project". After that, the generation of the preloader and the main bootloader from u-boot sources is shown, followed by the generation of the device tree blob. Then, the generation of the kernel and the root filesystem is presented which are needed for the SD card setup for the Intel Cycone V HPS which is delivered afterwards. After that, information regarding the boot process, and additional information are given. Finally, references for further information are mentioned.

Requirements

The requirements for bring-bringing up the HPS in the Intel Cyclone V SoC on the TEI0022 consists of the following important settings and tools:

  • Correct programmed system controller Intel MAX 10 on board TEI0022
  •  WindowsWindows:
    • Intel® Quartus® Prime Lite - Version 18.1 build 625
    • Intel® Soc FPGA Embedded Development Suite (Soc EDS) - Version 18.1 build 625
  • Linux:
    • git
    • fdisk
    • make
    • mkfs

Intel Quartus Prime project generation

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In this section, additional describtive descriptive and explanatory information are given. Refer to "Additional Information" for more detailed information.

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