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Scroll Title |
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anchor | Table_OBP |
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title | On board peripherals |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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SDRAM
TEI0023 is equipped with a Winbond 64 MBit (8 MByte) SDRAM chip in standard configuration, variants with 256 Mbit (32 MByte) memory density are also available. The SDRAM chip is connected to the FPGA bank 3 and 6 via 16-bit memory interface.
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Scroll Title |
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anchor | Table_RH_DCH |
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title | Document change history. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Contributor | Description |
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Page info |
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infoType | Modified date |
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dateFormat | yyyy-MM-dd |
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type | Flat |
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| Page info |
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infoType | Current version |
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prefix | v. |
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type | Flat |
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showVersions | false |
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| Page info |
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infoType | Modified by |
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type | Flat |
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showVersions | false |
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| | | v.41 | Antti Lukats | | 2020-08-20 | v.36 | Antti Lukats | - correction: Key features, overview, USB, SDRAM, SPI section
| 2020-02-04 | v.33 | ED, Kilian Jan | | -- | all | Page info |
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infoType | Modified users |
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type | Flat |
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showVersions | false |
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