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| Info |
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Functionality of buttons, DIP switches, LEDs depends on CPLD Firmware. Following description is only for newest firmware version, which is available on the download area |
| Scroll Title |
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| anchor | Figure_Overview |
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| title | Board Overview |
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| Scroll Ignore |
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| scroll-pdf | true |
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| scroll-office | true |
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| scroll-chm | true |
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| scroll-docbook | true |
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| scroll-eclipsehelp | true |
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| scroll-epub | true |
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| scroll-html | true |
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| draw.io Diagram |
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| border | true |
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| viewerToolbar | true |
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| fitWindow | false |
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| diagramName | TEIB0006_TEI0006 |
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| simpleViewer | false |
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| width | 600 |
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| diagramWidth | 641 |
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| revision | 2 |
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Image Removed
| Number | Note |
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| 1 | J1/3 - SFP+ connector |
| 2 | B1 - Battery holder CR1220J14 - CRUVI connector |
| 3 | J12 - Power Jack, 2.0mm, DC (12V power input) |
| 4 | J5 - RJ45 Ethernet Connector |
| 5 | J5 - RJ45 Ethernet Connector LED yellow |
| 6 | J5 - RJ45 Ethernet Connector LED green |
| 7 | D1 - LED red (Usage: status led for Intel Cyclone 10 GX) || D2 - LED green (Usage: status led for power sequencer ip in Intel MAX10) || D3 D3 - LED green (Usage: user defined) || D4 D4 - LED green (Usage: user defined) |
| 8 | J8 - USB 2.0 Micro B Receptacle |
| 9 | J13 - USB 3.0 Micro B Receptacle |
| 10 | S1 - DIP Switch for JTAG access and write protection for EEPROM U13 on TEIB0006 |
| 11 | S5 - reset button for Intel MAX 10 on TEI0006 |
| 12 | S4 - user button, connected to vin_fault input of power sequencer ip in Intel MAX10 |
| 13 | S3 - reset button for Intel Cyclone 10 GX on TEI0006 |
| 14 | D2 - LED red (Usage: status) red || D3 - LED red (Usage: connected to user button S4) || D4 - LED green (Usage: status) |
| 15 | J6 - FMC HPC connector |
Power supply
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The input power supply must be mentioned. Add Link to overview picture with connector label.
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| Scroll Title |
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| anchor | Table_BUT_1 |
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| title | Buttons (CPLD Firmware depended) |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Overview 11;12;13 | Default | Description |
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| S3 | High | reset button for Intel Cyclone 10 GX, connected to: - nCONFIG pin (Intel Cyclone 10 GX)
- D2 - LED red (TEIB0006)
| | S4 | High | user button, connected to: D3 - LED red (TEIB0006)vin_fault input of power sequencer ip in Intel MAX10 | | S5 | High | reset button for Intel MAX 10, connected to: - nCONFIG pin (Intel MAX10)
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*Note: Reset button S5 is not Firmware depended |
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| Scroll Title |
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| anchor | Table_LED |
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| title | Module LEDs (CPLD Firmware depended) |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Label | Designator | Color | Usage | Description |
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| Overview - 7 | D1 | red | status | connected to nSTATUS pin from Intel Cyclone 10 GXfirmware dependent | | Overview - 7 | D2 | green | status | user defined | firmware dependentconnected to nfault status of power sequencer ip in Intel MAX10 | | Overview - 7 | D3 | green | user defined | connected to DATA0 pin from Intel Cyclone 10 GXfirmware dependent | | Overview - 7 | D4 | green | user defined | connected to DATA0 pin from Intel Cyclone 10 GXfirmware dependent |
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JTAG/UART
| Label | Designator | Description |
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| Overview - 8 | J8 | JTAG/UART over USB, UART Speed depends on design, normally 115200 |
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It's recommended to use prebuilt *.pof or *.sof jic file of newest Reference Design for first test. Basic Steps:
- Power Supply over 12V power jack
- Download Reference Design
- Open Quartus Prime
- Open Quartus Programmer from top menu: Tools → Programmer
- Select from Programmer top menu: Edit → Hardware Setup
- Select via the drop down menu: Arrow-USB-Blaster [USB0] (Installation of Arrow USB Programmer Driver needed) and close the window
- Click Add File...
- Select correct *.pof or *.sof jic file and press Open
- Click Start to program the device
- Open Putty with correct COM port and Speed
- Press reset button S3
- For more details check Reference Design description
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