CompactPCI connector J2 J3 is not fittedby default on the TEC0850 board by default, but is necessary if the second optional USB2 PHY U13 if fitted and its USB2 differential serial data interface is connected to the cPCI connector J2.
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Scroll Title
anchor
Table_SIP_cPCI_J2J3_io
title
cPCI J2 J3 interfaces
Scroll Table Layout
orientation
portrait
sortDirection
ASC
repeatTableHeaders
default
style
widths
sortByColumn
1
sortEnabled
false
cellHighlighting
true
Interfaces
I/O Signal Count
LVDS-pairs count
Connected to
VCCO bank Voltage
Notes
USB2
-
1 (RX/TX)
USB2 PHY U13
-
USB2 OTG A-Device (host)
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On the header J13, there is also a optional reference clock signal from PLL clock U14 available, which can be also if the necessary resistors and capacitors are fitted on board. The clock can also be used for the SC FPGA U18 and on the cPCI connector J1.
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anchor
Figure_SIP_10pin_jtag_uart
title
10-pin JTAG/UART header
Scroll Only
Scroll Ignore
draw.io Diagram
border
false
viewerToolbar
true
fitWindow
false
diagramDisplayName
lbox
true
revision
34
diagramName
TEC0850 header 13
simpleViewer
false
width
links
auto
tbstyle
hidden
diagramWidth
641
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Scroll Title
anchor
Table_RH_DCH
title
Document change history
Scroll Table Layout
orientation
portrait
sortDirection
ASC
repeatTableHeaders
default
style
widths
sortByColumn
1
sortEnabled
false
cellHighlighting
true
Date
Revision
Constributor
Description
Page info
infoType
Modified date
dateFormat
yyyy-MM-dd
type
Flat
Page info
infoType
Current version
prefix
v.
type
Flat
showVersions
false
Page info
infoType
Modified by
type
Flat
showVersions
false
small corrections
v.101
John Hartfiel
style changes
v.97
Ali Naseri
added information about the optional second USB2 PHY and cPCI connector J2 (not fitted by default)
