Page History

Notes :

• short description of the design

• Short Link of "Scroll only" macro:

  • Use short link the Wiki Resource page, for example: http://trenz.org/te0720-info

  • List of available short links: https://wiki.trenz-electronic.de/display/TI/Redirects

Notes :

• Add basic key features, which can be tested with the design

• USB(JTAG/UART)
• LED

• add known Design issues and general notes for the current revision
• do not delete known issue, add fixed version time stamp if issue fixed

Notes :

• list of software which was used to generate the design

Notes :

• list of hardware which was used to generate the design
• mark the module and carrier board, which was used tested with an ^*

^*used as reference

^*used as reference

• prebuilt files
• Template Table:

  • 
    

    Scroll Title
    anchor Table_

• • PF title-alignment center title

• • Prebuilt files

    Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true

• • File

• • File-Extension

• • Description BIF-File *.bif File with description to generate Bin-File BIN-File *.bin Flash Configuration File with Boot-Image (Zynq-FPGAs) BIT-File *.bit FPGA (PL Part) Configuration File Boot Script-File *.scr Distro Boot Script file DebugProbes-File *.ltx Definition File for Vivado/Vivado Labtools Debugging Interface Debian SD-Image *.img Debian Image for SD-Card Diverse Reports --- Report files in different formats Device Tree *.dts Device tree (2 possible, one for u-boot and one for linux) Hardware-Platform-Description-File *.xsa Exported Vivado hardware description file for Vitis and PetaLinux LabTools Project-File *.lpr Vivado Labtools Project File MCS-File *.mcs Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) MMI-File *.mmi File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) OS-Image *.ub Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) Software-Application-File *.elf Software Application for Zynq or MicroBlaze Processor Systems SREC-File *.srec Converted Software Application for MicroBlaze Processor Systems

    
    

• Important set new Vivado version link on every Design update of new vivado version!
• Set Link to download folder (Remove ../de/.. ../en/.. from url) for example: https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/TE0712/Reference_Design/2018.2/test_board

• Basic Design Steps

• Add/ Remove project specific description

Note:

• Basic Design Steps

• Add/ Remove project specific description

• Description of Block Design, Constrains... BD Pictures from Export...

## blink.ccf
#
# Date: 2022-10-21
#
# Format:
# <pin-direction> "<pin-name>" Loc = "<pin-location>" | <opt.-constraints>;
#
# Additional constraints can be appended using the pipe symbol.
# Files are read line by line. Text after the hash symbol is ignored.
#
# Available pin directions:
#
# Pin_in
#   defines an input pin
# Pin_out
#   defines an output pin
# Pin_inout
#   defines a bidirectional pin
#
# Available pin constraints:
#
# SCHMITT_TRIGGER={true,false}
#   enables or disables schmitt trigger (hysteresis) option
# PULLUP={true,false}
#   enables or disables I/O pullup resistor of nominal 50kOhm
# PULLDOWN={true,false}
#   enables or disables I/O pulldown resistor of nominal 50kOhm
# KEEPER={true,false}
#   enables or disables I/O keeper option
# SLEW={slow,fast}
#   sets slew rate to slow or fast
# DRIVE={3,6,9,12O pulldown resistor of nominal 50kOhm
# KEEPER={true,false}
#   setsenables outputor drivedisables strengthI/O to 3mA..12mAkeeper option
# DELAY_OBFSLEW={0..15slow,fast}
#   adds an additional delay of n *sets nominalslew 50psrate to slow outputor signalfast
# DELAY_IBF={0..15DRIVE={3,6,9,12}
#   addssets anoutput additional delay of n * nominal 50psdrive strength to input signal3mA..12mA
# FFDELAY_IBFOBF={true,false0..15}
#   enablesadds oran disablesadditional placingdelay of n FF* innominal input50ps buffer,to ifoutput possiblesignal
# FFDELAY_OBFIBF={true,false0..15}
#   enablesadds oran disablesadditional placingdelay of n FF* innominal output50ps buffer,to ifinput possiblesignal
# LVDSFF_BOOSTIBF={true,false}
#   enables or disables increasedplacing LVDSof outputFF currentin of 6.4mA (default: 3.2mA)input buffer, if possible
# LVDSFF_TERMOBF={true,false}
#   enables or on-chipdisables LVDSplacing terminationof resistorFF ofin nominaloutput 100Ohmbuffer, inif output mode only
#
# Global IO constraints can be set with the default_GPIO statement. It can be
# overwritten by individual settings for specific GPIOs, e.g.:possible
# LVDS_BOOST={true,false}
#   enables increased LVDS output current of 6.4mA (default: 3.2mA)
# LVDS_TERM={true,false}
#   default_GPIO | DRIVE=3; # sets all output strengths to 3mA, unless overwritten
#

Pin_in   "clk"  Loc = "IO_SB_A8" | SCHMITT_TRIGGER=true;
Pin_out  "UART_TXD"   Loc = "IO_SB_A4"; # MIO15
Pin_out  "led"  Loc = "IO_SB_B4"; # one board LED
#Pinenables on-chip LVDS termination resistor of nominal 100Ohm, in output mode only
#
# Global IO constraints can be set with the default_GPIO statement. It can be
# overwritten by individual settings for specific GPIOs, e.g.:
#   default_GPIO | DRIVE=3; # sets all output strengths to 3mA, unless overwritten
#

Pin_in   "resetnclk"   Loc = "IO_EASB_B2A8"; # TEB0707 user button active high!
#Pin| SCHMITT_TRIGGER=true;
Pin_in   "resetnrst"   Loc = "IO_SBEB_B6B0"; # permanent 1SW3
#PinPin_inout   "resetnled"   Loc = "IO_SB_B5B4"; # permanent 0


D1

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