Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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VHDL Port name | Direction | SC CPLD Pin | Connected to | Function | Notes |
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ACBUS0 |
| A4 | FTDI U4, pin 22 | GPIO's available to user
| currently not used/implemented (FIFO or other FTDI functions when FTDI reprogrammed)
| ACBUS1 |
| B4 | FTDI U4, pin 23 | ACBUS2 |
| A5 | FTDI U4, pin 24 | ACBUS3 |
| B5 | FTDI U4, pin 25 | ACBUS4 |
| A6 | FTDI U4, pin 26 | ACBUS5 |
| B6 | FTDI U4, pin 27 | ACBUS6 |
| A7 | FTDI U4, pin 28 | ACBUS7 |
| A8 | FTDI U4, pin 29 | ADBUS4 |
| A2 | FTDI U4, pin 17 | ADBUS5 |
| B2 | FTDI U4, pin 18 | ADBUS6 |
| A3 | FTDI U4, pin 19 | ADBUS7 |
| B3 | FTDI U4, pin 20 | P_TCK | IN | G2 | J5, pin 1 | JTAG signals from pin header J5 for SC CPLD programming (S2-4 ON)
| Can be used as additional IOs via JTAG pinsharing, JTAGEN (S2-4 OFF). Schematic signal names without 'P_'.
| P_TDI | IN | F5 | J5, pin 9 | P_TDO | OUT | F6 | J5, pin 3 | P_TMS | IN | G1 | J5, pin 5 | F_TCK | IN | H2 | FTDI U4, pin 12 | Forwarded JTAG signals from FTDI chip. Signal names: TCK, TDI, TDO, TMS | (FIFO or other FTDI functions when FTDI reprogrammed) | F_TDI | IN | G4 | FTDI U4, pin 13 | F_TDO | OUT | F4 | FTDI U4, pin 14 | F_TMS | IN | H5 | FTDI U4, pin 15 | M_TCK | OUT | H5 | JB2, pin 100 | 4x5 Module JTAG
| Bank with VCCIO is VREF_JTAG from Module
| M_TDI | OUT | J2 | JB2, pin 96 | M_TDO | IN | J1 | JB2, pin 98 | M_TMS | OUT | H6 | JB2, pin 94 | FMC_TCK | OUT | F8 | J1, pin D29 | FMC JTAG
| TRST not used
| FMC_TDI | OUT | M7 | J1, pin D30 | FMC_TDO | IN | N7 | J1, pin D31 | FMC_TMS | OUT | M8 | J1, pin D33 | FMC_TRST |
| N8 | J1, pin D34 | PCIE_TCK |
| L11 | J3, pin A5 | PCIe JTAG
| Currently not used
| PCIE_TDI |
| N12 | J3, pin A6 | PCIE_TDO |
| M12 | J3, pin A7 | PCIE_TMS |
| M13 | J3, pin A8 | PCIE_TRST |
| G10 | J3, pin B9 | PCIE_PERST | IN | F12 | J3, pin A11 | Indication that PCIe Bus is up (power, clocks) |
| EN_FMC | OUT | L4 | U14, pin 9 | Enable switched 3.3V FMC power | pulled down | EN_FMC_VADJ | OUT | K7 | U1, pin 41 | Enable IO power FMC_VADJ | pulled down | EN_PER | OUT | F13 | Q4, pin 5 | Enable perepherie power 3V3_PER | pulled down | FAN_FMC_EN | OUT | K8 | Q1, pin 5 | Enable FMC FAN | floating during configuration (no pull down) | FMC_PG_C2M | OUT | M5 | J1, pin D1 | Indicate that all FMC related powers are up | pulled up | FMC_PRSNT_M2C_L | IN | E9 | J1, pin H2 | Indicate if FMC installed | Low when FMC present, CPLD weak pullup enabled | FMC_SCL | OUT | J8 | J1, pin C31 | I2C 2-wire serial bus | MUX in CPLD | FMC_SDA | INOUT | F9 | J1, pin C30 | PG_FMC_VADJ | IN | J6 | U1, pin 35 | Indicate FMC VADJ power is up |
| FF_RSTL | OUT | B9 | J13, pin 6 and J18, pin 6 | Reset configuration | Both FF are resetted simultanously when pulled LOW | FFA_INTL | IN | E8 | J13, pin 5 | Indicate interrrupt | LOW when fault condition, pulled up | FFA_MPRS | IN | C10 | J13, pin 3 | Indicate FF Module installed | LOW when Module present, pulled up | FFA_MSEL | OUT | C9 | J13, pin 4 | Select attached FF Module | Pull low to use I2C | FFA_SCL | OUT | D6 | J13, pin 8 | I2C 2-wire serial bus | MUX in CPLD | FFA_SDA | INOUT | E6 | J13, pin 7 | FFB_INTL | IN | A10 | J18, pin 5 | Indicate interrrupt | LOW when fault condition, pulled up | FFB_MPRS | IN | A11 | J18, pin 3 | Indicate FF Module installed | LOW when Module present, pulled up | FFB_MSEL | OUT | B10 | J18, pin 4 | Select attached FF Module | Pull low to use I2C | FFB_SCL | OUT | D8 | J18, pin 8 | I2C 2-wire serial bus | MUX in CPLD | FFB_SDA | INOUT | A9 | J18, pin 7 | CPLD_IO_1 | IN | B12 | JB1, pin 88 | (M)IOs from 4x5 Module | (M)IOs used for ETH PHY LEDs
| CPLD_IO_2 | IN | A12 | JB1, pin 92 | (M)IOs from 4x5 Module | M10_RST |
| D1 | TP22 |
| Not used
| M10_RX |
| E4 | TP24 | M10_TX |
| E3 | TP23 | EN1 | OUT | D11 | JB1, pin 27 | Enable on module power | Depends on module, on some similar to reset. | MODE | OUT | B11 | JB1, pin 31 | Boot Mode selection | For Zynq modules only. (LOW → SD, HIGH → primary QSPI) | NOSEQ | OUT | E13 | JB1, pin 8 | Disable module CPLD power management | Depends on module. On some modules no extended CPLD power management avaialble. | PGOOD | INOUT | C11 | JB1, pin 29 | Power good signal | This is only for monitoring, do not use as powerenable! Pulled up. | RESIN | OUT | E12 | JB2, pin 17 | Module Reset | Aktive LOW | M3.3VOUT | IN | M4 | JB2, pin 9 and 11 | Indicates module power is up | Used for perepherie power enable. Floating when no module installed (no pull down). | SFPA_LOS | IN | M10 | J12, pin 8 | SFP signal loss | HIGH indicates signal loss | SFPA_M-DEF0 | IN | F10 | J12, pin 6 | SFP modul absent | HIGH when module physically absent | SFPA_RS0 | OUT | N10 | J12, pin 7 | SFP rate select RX | LOW for 1000BASE-SX, HIGH for 10GBASE-SR | SFPA_RS1 | OUT | M11 | J12, pin 9 | SFP rate select TX | LOW for 1000BASE-SX, HIGH for 10GBASE-SR | SFPA_SCL | OUT | L10 | J12, pin 5 | I2C 2-wire serial bus | MUX in CPLD | SFPA_SDA | INOUT | N9 | J12, pin 4 | SFPA_TX_DIS | OUT | M9 | J12, pin 3 | SFP transmitter disable | HIGH disables transmitter | SFPA_TX_FAULT | IN | G9 | J12, pin 2 | Indicates SFP laser fault | HIGH indicates fault | VID0_FMC_VADJ | OUT | E10 | U1, pin 34 | FMC_VADJ Voltage select | Chip internal pulled up
| VID1_FMC_VADJ | OUT | J7 | U1, pin 33 | VID2_FMC_VADJ | OUT | L5 | U1, pin 32 | VID0 | IN | K6 | S2-1 | For FMC_VADJ Voltage select
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| VID1 | IN | N5 | S2-2 | VID2 | IN | N4 | S2-3 | FMC_JTAG | IN | L3 | S2-6 | Select FMC JTAG port |
| CM0 | IN | M3 | S2-7 | SoM enable power |
| CM1 | IN | L2 | S2-8 | SoM Bootmode |
| CM2 | IN | K2 | S3-1 | disable SoM pwersequenzing |
| USR0 | IN | K1 | S3-2 | FMC VADJ power enable | also if no FMC installed | USB_OC | IN | D9 | U12, pin 5 |
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| EN_5VSATA | OUT | E1 | U15, pin 1 | Enable/Disable SATA pin 7 power |
| OC_VSATA | IN | F1 | U15, pin 2 | Overcurrent detection SATA pin 7 power |
| BUTTON | IN | N6 | S1 | Module reset button |
| SD-CD | IN | M1 | J8, pin 9 | SD-Card card detect switch | Currently not used | LED1 | OUT | J5 | D1 | user LED |
| LED2 | OUT | K5 | D2 | LED_D4 | OUT | C2 | D4 | Status LED |
| PHY_LED1 | OUT | D12 | J9 | Phy LEDs
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| PHY_LED1R | OUT | C13 | J9 | PHY_LED2 | OUT | B13 | J9 | PHY_LED2R | OUT | C12 | J9 | A_00_N | IN | J10 | JB1, pin 38 | SDA IN | "three wire" I2C | A_00_P | IN | K10 | JB1, pin 36 | SCL IN | "three wire" I2C | A_01_N | OUT | L12 | JB1, pin 35 | TX data | RGPIO | A_01_P | OUT | K11 | JB1, pin 37 | SDA OUT | "three wire" I2C | A_02_N | IN | J12 | JB1, pin 41 | RX CLK | RGPIO | A_02_P | IN | K12 | JB1, pin 39 | RX data | RGPIO | A_03_N |
| H10 | JB1, pin 44 | Module to CPLD communication | currently not used | A_03_P |
| J9 | JB1, pin 42 | A_04_N |
| H13 | JB1, pin 47 | A_04_P |
| J13 | JB1, pin 45 | A_05_NP | IN | H8H9 | JB1, pin 5755 | A_05_PN | IN | H9H8 | JB1, pin 5557 | PHY LEDs | Have to be Forwarede on SoM to this pins. | A_06_P | IN | G13 | JB1, pin 51 | A_06_N | IN | G12 | JB1, pin 49 | I2C GPIO MUX 0 | I2C MUX also used for FireFlys MSEL | A_07 | IN | L13 | JB1, pin 34 | I2C GPIO MUX 1 |
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