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Host Computer's Software Connection (with I2C EEPROM) Available

These two commands could (but they not necesseraly should) be used to change FX2 microcontroller's firmware and readback the EEPROM content.

Note
The EEPROM switch should be enabled, or these two commands will fail.

Host Computer's Software Connection (with I2C FPGA or other device) Available

General Description

TE USB FX2 module has a flexible IIC (aka I2C) bus on-board as outlined in the figure below.

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Scroll pdf title
titleI2C bus modes summary.

core

EZ-USB FX2LP

FPGA
(SDA = I/O)

B2B J(M)5

serial EEPROM

default

master

slave
SCL = I

slave

slave

custom

inactive
SCL = SDA = Z

master
SCL = O

slave

slave

custom

inactive
SCL = SDA = Z

slave
SCL = I

master

slave

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FX2 microcontroller's Interface with the IIC slave device EEPROM: it is used for firmware configuration and firmware loading in RAM from EEPROM

See Firmware configuration.

FX2 microcontroller's Interface with IIC slave device FPGA (XPS_I2C_SLAVE custom IP core block): in reference design case is used for MB Commands

TE USB FX2 module reference design includes an HDL core managing the fast mode (400 kHz) I2C communication between the Xilinx MicroBlaze embedded soft-processor and the EZ-USB FX2LP USB FX2 microcontroller.

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