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Table of Contents |
Overview
Trenz Electronic TE0728 is an automotive-grade FPGA module integrating a Xilinx Automotive Zynq-7020 FPGA, two 100 Mbit Ethernet transceivers (PHY) , 512 MByte DDR3L SDRAM, 16 MByte Flash memory for configuration and operation, and powerful switching-mode power supplies for all on-board voltages. Numerous configurable I/Os are provided via rugged high-speed strips.
Within the complete module only Automotive components are installed.
All this in a compact 6 x 6 cm form factor, at the most competitive price.The Trenz Electronic TEB0728 Carrier Board provides functionalities for testing, evaluation and development purposes of company's 6 x 6 cm SoMs. The Carrier Board is equipped with various components and connectors for different configuration setups. See "6 x 6 SoM" Carriers" page for more information about 6 x 6 cm SoMs.
Refer to http://trenz.org/te0728TEB0728-info for the current online version of this manual and other available documentation.
Key Features
- Samtec Tiger Eye Terminal Socket ( 80 pins, 2 rows)
- Micro SD card socket
- 3 User LEDs, Red, Yellow, Green
- Two RJ45 Gigabit Ethernet socket
- Trenz 6x6 module connector strips (3 x Samtec Tiger Eye series connectors)
- Barrel Jack for 12V 5V power supply
- One user push button
Block Diagram
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Main Components
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title | TE0728 TEB0728 main components |
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- User push-button, S1
- Jumper (Boot Mode), J4
- External connector (VG96) placeholder, J5 / J6Board to Board Connector, J1-J2-J3
- LEDs , D1
- CR1220 Backup-Battery holder, B1
- SD Card Connector, J10
- Board to Board Connector, J1-J2-J3
- RJ45 Gigabit Ethernet connector, J7-J8
- User push-button, S1
- Jumper, J4
- XMOD JTAG- / UART-header, JB1
- Barrel jack for 5V power supply, J9
- Jumper Jumper(VCCIO_13), J11External connector (VG96) placeholder, J5 / J6
- CR1220 Backup-Battery holder, B1
Initial Delivery State
There is no hardware component to be programmed on teh the carrier.
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Configuration Signals
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- Overview of Boot Mode, Reset, Enables,
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title | Boot process. |
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Signal | Designator | B2B | Signal LevelJumper | Boot Mode |
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Boot_R | J4 | J2-11 | Open | QSPI | Short | SD Card |
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Reset Process
There is a user push button which is used for RESET signal.
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Signal | Designator | B2B | Active Level |
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RESET | S1 | J2-7 | Active High |
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Signals, Interfaces and Pins
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Board to Board (B2B) I/Os
FPGA bank number and number Number of I/O signals FPGA bank numbers connected to the B2B connectorconnectors:
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B2B Connector | Interfaces | Number of I/O | Notes |
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J1
| User I/O | 48 singel ended, 24 differential | Connected to Bank 13 | 4 Single ended | MIO10 | -...13 | CANH , CANL | 2 single ended | MIO8, MIO9 | J2
| User I/O | 22 singel ended, 11 differential |
| 38 single ended | MIO16 | -...53 | SoM Control Signals | 5 | RESET, RST_OUT, BOOT_R, | JTAG Interface | 4 | TCK , TDO, TDI, TMS | J3
| User I/O | 20 Single ended, 10 differential
| Connected to Bank 35 | 34 single ended, 17 differential | Connected to Bankd 33 | Ethernet 1 | 4 single ended, 2 differential | ETH_CTREF , ETH_TD+, ETH_TD- , ETH_RD+, ETH_RD-, ETH_LED1, ETH_LED2, ETH_LED3 | Ethernet 2 | 4 single ended, 2 differential | ETH_CTREF , ETH_TD+, ETH_TD- , ETH_RD+, ETH_RD-, ETH_LED1, ETH_LED2, ETH_LED3 |
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On-board Connector
There are two pin placeholder on the board, J5-J6.
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B2B VGA96 Vertical Connector | Interfaces | Number of I/O | Notes |
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J5
| User I/O | 48 singel ended, 24 differential | Connected to Bank 13 | 34 single ended, 17 differential | Connected to Bank 33 | J6
| User I/O | 42 singel ended, 21 differential |
| 27 single ended | MIO16 | -39 + MIO 51-... MIO39 + MIO51...53 | 4 single ended | MIO10 | -...13 | SoM Control Signals | 3 | RESET, RST_OUT, BOOT_R | JTAG Interface | 4 | TCK , TDO, TDI, TMS | CANH , CANL | 2 | Single
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JTAG Interface Base
JTAG access to the Xilinx XXXXXXX FPGA TEB0728 Trenz module is available through B2B connector JM2.J2. JTAG Programmer TE0790_02 is provided by Trenz Electronic, More information is available here.
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JTAG SignalTMS | J2-12 | TDI10TDO | J2-8 | TCKJB1-3 | UART Txd - input | B | J2- | 6 |
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7 | UART Rxd - Output | C | J2-12 | JB1-4 | JTAG-TMS | D | J2-10 | JB1-8 | JTAG-TDI | F | J2-8 | JB1-10 | JTAG-TDO | H | J2-6 | JB1-12 | JTAG-TCK | G | J2-7 | JB1-11 | RESET will be connected to Push Button on JTAG Programmer | 3.3V | - | JB1-5 | connected to GND | VIO | J2-2/4 | JB1-6 | VIO is connected to 3.3V which is supplied by carrier |
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SD Card Socket
Power supply voltage for SD card holder is 3.3V.
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Schematic | Color | Connected to | Active Level | IO Standard |
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| CLK | J2-34 |
| DAT0 | J2-37 |
| DAT1 | J2-40 |
| DAT2 | J2-32 |
| CD/DAT3 | J2-31 |
| CD | J2-35 |
| WP | J2-33 |
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RJ45 Connector
Both Ethernet sockets,ETH1 and ETH2, are connected to the Board to Board (B2B) J3 on the carrier.
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title | Ethernet PHY to Zynq SoC connectionsConnections to B2B Connectors |
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SchematicPullupCTREF | TDRDRD+ | LED1 | LED2 | LED3 | POWERDOWN/INT | RESET_N | |
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Power Supply
Power supply with minimum current capability of 3.5 A for system startup is recommended.
Power Consumption
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Transfer | ETH_TD- | J3-56 | J3-26 |
| ETH_RD+ | J3_52 | J3-22 | Receive | ETH_RD- | J3-50 | J3-20 |
| ETH_CTREF | J3_57 | J3-25 |
| ETH_LED1 | J3-55 | J3-23 | Yellow LED- Activity | ETH_LED3 | J3-51 | J3-19 | Green Green- Link |
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On-board Peripherals
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- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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Push button
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title | Power DistributionOn-board push button |
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Power-On Sequence
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Designator | Connected to | B2B | Active Level | Note |
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S1-A | RESET | J2-7 | Active high | General Input RESET |
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Jumpers
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Power Rail Name | B2B Connector JM1 Pin | B2B Connector JM2 Pin | B2B Connector JM3 Pin | Direction | Notes |
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Designator | Connected to | B2B | Note |
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J4 | Boot_R | J2-11 | Open: QSPI | Short: SD Card |
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J11 | VCCIO_13 | 3.3 V | Pin 1 and the middle pin are connected | 1.8 V | Pin 3 and the middle pin are connected |
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LEDs
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Designator | Color | B2B | Active Level | Note |
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D1-A | Red | J2-30 | Active high |
| D1-B | Yellow | J2-38 | Active high |
| D1-C | Green | J2-36 | Active high |
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Power and Power-On Sequence
Power Supply
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Single 5V power supply with minimum current capability of 2.5A is recommended to operate the board.
- 5V VIN (inner)
GND (outer)
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Power Consumption
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Power Input Pin | Typical Current |
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VIN | TBD* | VBATT | TBD* |
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* TBD - To Be Determined
Power Rails
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6 x 6 modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.
3 x REF-189018-01 (compatible to SEM-140-02-03.0-H-D-A), (80 pins, "40" per row)
Operating Temperature:-55°C ~ 125°C
Current Rating: 2.6A per ContactNumber of Positions: 80
Number of Rows: 2
Absolute Maximum Ratings
Processing System(PS)
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Symbols | Description | Min | Max | Unit |
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VCCINT | PL internal logic supply voltage | -0.5 | 1.1 | V |
VCCPAUX | PL auxiliary supply voltage | -0.5 | 2.0 | V |
VCCPLL | PL PLL supply | -0.5 | 1.1 | V |
VPREF | PL input reference voltage | -0.5 | 2.0 | V |
VCCO | PL supply voltage for HR I/O banks | -0.5 | 3.6 | V |
VIN | I/O input voltage for HR I/O banks | 1.71 | 3.45 | V |
Technical Specifications
Absolute Maximum Ratings
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Commercial grade: 0°C to +70°C.
Industrial and automotive grade: -40°C to +85°C.
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Module Connector (B2B) Designator | VCC / VCCIO | Direction | Pins | Notes |
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JB1 | VIN | Output | 1, 3 | Up to 12V carrier supply voltage | 3.3V | Input | 19 | PL IO-bank VCCIO | VCCO_13 | Output | 39 | 1.8V or 3.3V over jumper | JB2 | 3.3V | Input | 2, 4 | 3.3V module supply voltage | 1.8V | Input | 5 | PL IO-bank VCCIO | VBATT | Output | 1 | RTC buffer voltage | JB3 | - | - | - | - |
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Board to Board Connectors
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| 6 x 6 SoM TEM and SEM B2B Connectors |
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| 6 x 6 SoM TEM and SEM B2B Connectors |
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Absolute Maximum Ratings
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Parameter | Min | Max | Units | Reference Document |
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VIN supply voltage | 3.5 | 60 | V | TPS54260-Q1 datasheets. |
Supply voltage for PS MIO banks | 1.71 | 3.465 | V | See Xilinx DS187 datasheet. |
I/O input voltage for PS MIO banks | -0.2 | VCCO_MIO + 0.20 | V | See Xilinx DS187 datasheet. |
Supply voltage for PS DDR | 1.14 | 1.89 | V | See Xilinx DS187 datasheet. |
I/O input voltage for PS DDR | -0.20 | VCCO_DDR + 0.20 | V | See Xilinx DS187 datasheet. |
Supply voltage for HR I/Os banks | 1.14 | 3.465 | V | See Xilinx DS187 datasheet. |
I/O input voltage for HR I/O banks | -0.20 | VCCIO + 0.20 | V | See Xilinx DS187 datasheet. |
Storage Temperature | -65 | 150 | °C | See Xilinx DS187 datasheet. |
CAN Transceiver Temperature | -40 | 125 | °C | See Texas Instrument sn65hvd230q-q1 datasheet. |
SPI Flash Memory | -40 | 85 | °C | See Cypress S25FL127S datasheet. |
DDR3 SDRAM Temperature | -40 | 95 | °C | See Nanya NT5CC256M16CP-DIA datasheet. |
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Parameter | Min | Max | Units | Note |
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VIN supply voltage | -- | -- | V | - Connected directly to the module power supply, see Module TRM
| Storage Temperature | -25 | +85 | °C |
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Recommended Operating Conditions
Operating temperature range depends also on customer design and cooling solution. Please contact us for options.
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Parameter | Min | Max | Units | Note |
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VIN supply voltage | -- | -- | V | - Connected directly to the module power supply, see Module TRM
- 5V recommended for usage with TE0728
| Operating Temperature | -25 | +85 | °C |
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Physical Dimensions
Module size: 100 mm × 107.7 Module size: 60 mm × 60 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 7 mm.
PCB thickness: 1.6 mm.
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Currently Offered Variants
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Revision History
Hardware Revision History
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Date | Revision | Changes |
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2018-07-18 | 02 | - changed value R1
- changed magjack connectors J7, J8
- changed 2.1mm power jack THT on SMD
- magjack connectors: pin8 connected to frame (shassis ground)
- lib component update
- added thermal bias to mounting holes
- added visual serial number
- changed 2.1mm power jack THT on SMD
- added 2 x 10uF to VIN
| 2016-11-02 | 01 | |
Date | Revision | Note | PCN | Documentation Link |
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- | 01 | Prototypes | - |
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Hardware revision number is printed on the PCB board next to the module model number separated by the dash.
Document Change History
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prefix | v. |
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type | Flat |
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| change list | typo table title - power rail section
| 2019-6-25 | v.132 | Pedram Babakhani | | -- | all | Page info |
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infoType | Modified users |
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Disclaimer
Include Page |
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| IN:Legal Notices |
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| IN:Legal Notices |
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