Versions Compared

Key

  • This line was added.
  • This line was removed.
  • Formatting was changed.


1

Page properties
hiddentrue
idComments

Template Revision 2.112

  • Module: TRM Name always "TE Series Name" +TRM
    Example: "TE0728 TRM"
  • Carrier: TRM Name usually "TEB Series Name" +TRM
    Example: "TEB0728 TRM"

...


HTML
<!-- tables have all same width (web max 1200px and pdf full page(640px), flexible width or fix width on menu for single column can be used as before) -->
<style>
.wrapped{
  width: 100% !important;
  max-width: 1200px !important;
 }
</style>

3


Page properties
hiddentrue
idComments

Important General Note:

  • If some section is configurable and depends on Firmware, please refer to the addition page (for example CPLD). If not available, add note, that this part is configurable
  • Designate all graphics and pictures with a number and a description, Use "Scroll Title" macro

    • Use "Scroll Title" macro for pictures and table labels. Figure number must be set manually at the moment (automatically enumeration is planned by scrollPDF)
      • Figure template:

        Scroll Title
        anchorFigure_anchorname
        titleText


        Scroll Ignore

        Create DrawIO object here: Attention if you copy from other page, objects are only linked.


        Scroll Only

        image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed



      • Table template:

        • Layout macro can be use for landscape of large tables

      • Scroll Title
        anchorTable_tablename
        titleText

        Scroll Table Layout
        orientationportrait
        sortDirectionASC
        repeatTableHeadersdefault
        style
        widths
        sortByColumn1
        sortEnabledfalse
        cellHighlightingtrue

        ExampleComment
        12



    • The anchors of the Scroll Title should be named consistant across TRMs. A incomplete list of examples is given below

      • <type>_<main section>_<name>

        • type: Figure, Table
        • main section:
          • "OV" for Overview
          • "SIP" for Signal Interfaces and Pins,
          • "OBP" for On board Peripherals,
          • "PWR" for Power and Power-On Sequence,
          • "B2B" for Board to Board Connector,
          • "TS" for Technical Specification
          • "VCP" for Variants Currently in Production
          •  "RH" for Revision History
        • name: custom, some fix names, see below
      • Fix names:
        • "Figure_OV_BD" for Block Diagram

        • "Figure_OV_MC" for Main Components

        • "Table_OV_IDS" for Initial Delivery State

        • "Table_PWR_PC" for Power Consumption

        • "Figure_PWR_PD" for Power Distribution
        • "Figure_PWR_PS" for Power Sequence
        • "Figure_PWR_PM" for Power Monitoring
        • "Table_PWR_PR" for Power Rails
        • "Table_PWR_BV" for Bank Voltages
        • "Table_TS_AMR" for Absolute_Maximum_Ratings

        • "Table_TS_ROC" for Recommended_Operating_Conditions

        • "Figure_TS_PD" for Physical_Dimensions
        • "Table_VCP_SO" for TE_Shop_Overview
        • "Table_RH_HRH" for Hardware_Revision_History

        • "Figure_RH_HRN" for Hardware_Revision_Number
        • "Table_RH_DCH" for Document_Change_History
    • Use Anchor in the document: add link macro and add "#<anchorname>
    • Refer to Anchror from external : <page url>#<pagename without space characters>-<anchorname>

4



Page properties
hiddentrue
idComments

-----------------------------------------------------------------------

5


Page properties
hiddentrue
idComments

Note for Download Link of the Scroll ignore macro:

6


Scroll Ignore

Download PDF version of this document.

7


Scroll pdf ignore

Table of Contents

Table of Contents

...

The Trenz Electronic TEBA0714 is a carrier for Trenz Electronic module TE0714 which is an industrial - grade ... module ... based on Xilinx ...module integrated with Xilinx Artix 7. 

Refer to http://trenz.org/teba0714-info for the current online version of this manual and other available documentation.

Page properties
hiddentrue
idComments
Notes :

Key Features

Page properties
hiddentrue
idComments
Note:
 'description: Important components and connector or other Features of the module
→ please sort and indicate assembly optionsKey optionsKey Features'  must be split into 6 main groups:
  • FPGA/Module
    • Package:
    • Speed:
    • Temperature:
  • RAM/Storage
    • E.g. SDRAM, SPI
  • On Board
    • E.g. CPLD, PLL
  • Interface
    • E.g. ETH, USB, B2B, Display port
  • Power
    • E.g. Input supply voltage
  • Dimension
  • Module:
    • Trenz TE0714 Modul Carrier
    • Temperature:
  • On Board:
    • 2 x User LEDs (Red, Green)
    • 1 x DONE LED (Red)
  • Interface:
    • 2 x Pin - Header 50 50 Pol. (FPGA Bank I/Os and Power)
    • 2x Samtec 100 Pin LSHM Series Connectors2 x Pin-Header for FPGA Bank Power
    • 1 x XMOD JTAG/UART Adapter (TE0790) Pin-Header
    • 1 x Pin - Header 16 Pol. (JTAG, MGT-CLK, Boot Mode, XADC, I/O's)
    • 1 x Pin - Header 10 Pol. (Ein-/ und AusgängeFPGA Bank I/Os and Power)
    • 1 x SFP+ Connectors
  • Power:
    • 1 x LDO Regulator
    • 3.3V  Nominal Power supply
  • Dimension: 30 mm x 40  
    • 46 mm × 75 mm

Block Diagram

Page properties
hiddentrue
idComments

add drawIO object here.

Note
For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .



Scroll Title
anchorFigure_OV_BD
titleTEBA0714 block diagram


Scroll Ignore
draw.io Diagram
borderfalse
viewerToolbartrue
fitWindowfalse
diagramDisplayName
lboxtrue
revision512
diagramNameTEBA0714_OV_BD
simpleViewerfalse
width
linksauto
tbstylehidden
diagramWidth641639


Scroll Only
Image Modified


Main Components

Page properties
hiddentrue
idComments
Notes :
  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note
For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .



Scroll Title
anchorFigure_OV_MC
titleTEBA0714 main components


Scroll Ignore
draw.io Diagram
borderfalse
viewerToolbartrue
fitWindowfalse
diagramDisplayName
lboxtrue
revision6
diagramNameTEBA0714_OV_MC
simpleViewerfalse
width
linksauto
tbstylehidden
diagramWidth641


Scroll Only
Image Modified


  1. 6-SMT pin header J26 for selecting PL-bank I/O voltage6-, J26
  2. SMT pin header, J27 for selecting XMOD/JTAG VCCIO
  3. Samtec Razor Beam™ LSHM-150 B2B connector, JM1
  4. Board to Board  (B2B) Connector, JM1
  5. Board to Board  (B2B) ConnectorrSamtec Razor Beam™ LSHM-150 B2B connector, JM2
  6. XMOD header, JX1
  7. Voltage Regulator, U1
  8. User Red LED, D2
  9. User Green LED, D1 (redRed)
  10. SFP+ Connector, J1
  11. User Red LED D3, indicating FPGA's 'Programming DONE'-signal, D3
  12. 50 - pin header solder pads J20 for access to SoM's PL I/O-banks (LVDS pairs possible)(Not assembled),  J20
  13. 16 pin header (Not assembled),  J3,16-pin header solder pads J3, JTAG/UART header with ADC and MGT clock input
  14. 10-pin header solder pads J4 for access to SoM's PL I/O-banks (LVDS pairs possible)(Not assembled), J4 
  15. 50-pin header solder pads J17 for access to SoM's PL I/O-banks (LVDS pairs possible)(Not assembled), J17

Initial Delivery State

Page properties
hiddentrue
idComments
Notes :Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture.If there is no components which might have initial data ( possible on carrier) you must keep the table empty
  • VCCIO voltage selection jumpers are all set to 1.8 V.
  • Pin headers (not soldered to the board, but included in the package as separate component)


Scroll Title
anchorTable_OV_
Scroll Title
anchorTable_OV_IDS
titleInitial delivery state of programmable devices on the module

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

Storage device nameContentNotes
---------


Configuration Signals

Page properties
hiddentrue
idComments
  • Overview of Boot Mode, Reset, Enables.

...

Scroll Title
anchorTable_OV_BP
titleBoot process.

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

SignalMODE Signal StateBoot ModeNote
BOOTMODE
high or open
0Slave SelectMAP
1Master SPI
, x4 Mode

low or ground

Slave Selects MAP




Scroll Title
anchorTable_OV_RST
titleReset process.

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

SignalB2BSignal StateNote
PROG_BJM1-94Active LowClear FPGA configuration (falling edge) configuration  and initiate a new configuration sequenz (next rising edge).


Signals, Interfaces and Pins

Page properties
hiddentrue
idComments
Notes :
  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Board to Board (B2B) I/Os

FPGA bank number and number Number of I/O signals and Interfaces connected to the B2B connector:

Scroll Title
anchorTable_SIP_B2B
titleGeneral PL I/O to B2B connectors information

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

B2B ConnectorInterfaceNumber of I/ONotes
JM1



User I/O52 Single ended, 27 Differential-
MGT lanes4 Differential, 2 lanes
MGT reference clock input2 Single ended, 1 Differential
JTAG4 Single ended
SoM control signals2 Single ended'PROG_B', ' DONE'
JM2User I/O36 Single ended or 18 differential-
SFP+ Interface control signals8 Single ended
QSPI interface6 Single ended
UART interface2 Single ended
User LEDs2 Single endedRed, Green
SoM control signals1 Single ended'BOOTMODE'

...


On-board Pin Header

TEBA0714 is equipped with four pin headers J17, J20, J3 and J4 which are not assembled on the board, in case of need customer can solder the pins and have access to the signals in the following tableJTAG access to the mounted SoM is provided through B2B connector JM1 and JM2 and is also routed to the XMOD JTAG/UART header JX1.

Scroll Title
anchorTable_SIP_JTGPinHeader
titleJTAG pins connectionGeneral I/O to Pin headers information

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

XMOD
Pin Header
Pin
B2B ConnectorConnected toNoteAJM2-97B14_L25BJM2-99B14_L0EJM2-100BOOTMODEGJM1-94PROG_BCJM1-90TCKDJM1-86TDIFJM1-88TDOHJM1-92TMS3.3VJM1-97,993.3VVIOJM2-53V_CFG

SFP+ Connector

...

anchorTable_SIP_SFP+
titleSFP+ Connector Information

...

SMT Pin Header

There are two SMT Pin Headers, J25-J26.

...

anchorTable_SIP_SMD
titleSMD Connector Information

...

On-board Peripherals

Page properties
hiddentrue
idComments

Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs

...

hiddentrue
idComments

Notes :

...

InterfaceNumber of I/ONotes
J17



User I/O36 Single ended, 18 DifferentialModule FPGA Bank 14
SPI interface6 Single ended-
Power4 Single ended3.3V, V_CFG
J20User I/O42 Single ended or 21 differentialModule FPGA Bank 34
Power4 Single ended3.3V, V_CFG
User LEDs2 Single endedRed, Green
SoM control signals1 Single ended'BOOTMODE'
J3JTAG 4 Single ended
UART2 Single endedB14_L25, B14_L0
ADC2 Single ended
Clock2 Single ended, 1 Differential
Power4 Single ended3.3V, V_CFG
Control Signals2 Single endedBOOTMODE, PROG_B
J4User I/O6 Single ended or 3 differential
Power2 Single ended3.3V, 3.3V_OUT


JTAG Interface Base

JTAG access to the mounted SoM is provided through B2B connector JM1 and JM2 and is also routed to the XMOD JTAG/UART header JX1.

Scroll Title
anchorTable_SIP_JTG
titleJTAG pins connection

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

XMOD Header PinSchematicB2B ConnectorPin HeaderNote
AB14_L25JM2-97J3-4UART Transfer
BB14_L0JM2-99J3-7UART Receive
EBOOTMODEJM2-100J3-9
GPROG_BJM1-94J3-11
CTCKJM1-90J3-4
DTDIJM1-86J3-10
FTDOJM1-88J3-8
HTMSJM1-92J3-12
3.3V3.3VJM1-97,99J3,J4,J17,J20Nominal Input Voltage
VIOV_CFG-J17-45Configuration Voltage


The DIP-switch S2 on XMOD Adapter TE0790 must be set as the following table.

Scroll Title
anchorTable_SIP_XMODS2
titleJTAG pins connection

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

S2StatusDescriptionNotes      
1ONUpdate Mode JTAG access to SC CPLD only
2OFFMust be in OFF state always
3OFF3.3V  is inputsupplied from pin headers externally
4OFFVIO is inputsupplied from pin header externally


SFP+ Connector

Scroll Title
anchorTable_OBPSIP_SFP+
titleOn board peripheralsSFP+ Connector Information

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

PinConnected toChip/InterfaceDesignatorNotes
LEDsVCCRD13...3

LEDs

...

anchorTable_OBP_LED
titleOn-board LEDs

...

Power and Power-On Sequence

...

hiddentrue
idComments

In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:

  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit
Note

For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .

3V
VCCT3.3V
VREFGND
TD+/TD-MGT TXMGT Lane
RD+/RD-MGT RXMGT Lane
TX/FAULTSFP0_TX_FAULSFP_CTRL
TX/DISABLESFP0_TX_DISSFP_CTRL
MOD-DEF2SFP0_SDASFP_CTRL
MOD-DEF1SFP0_SCLSFP_CTRL
MOD-DEF0SFP0_MT_DEF0SFP_CTRL
RS0/RS1SFP0_RS0_1SFP_CTRL
LOSSFP0_LOSSFP_CTRL


SMT Pin Headers

There are two SMT Pin Headers, J26-J27.
J26 is available to choose voltage level for VCCIO34 (FPGA Bank 34) and J27 is provided to set the voltage level of V_CFG (Configuration Voltage). In order to set the voltage level, you should connect it to the corresponding pin with the target value voltage.

Scroll Title
anchorTable_SIP_SMD
titleSMD Connector Information

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

SMT Pin HeaderVCCIO/VCCVoltage LevelNotes
J26VCCIO34

1.8V
2.5V
3.3V3.3V_OUT
J27V_CFG

1.8V
2.5VV_CFG0
3.3V3.3V_OUT


On-board Peripherals

Page properties
hiddentrue
idComments
Notes :
  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs


Page properties
hiddentrue
idComments
Notes :In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection


Scroll Title
anchorTable_OBP
titleOn board peripherals

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

Chip/InterfaceDesignatorNotes
LEDsD1...3


LEDs

Scroll Title
anchorTable_OBP_LED
titleOn-board LEDs

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

DesignatorColorConnected toActive LevelNote
D1GreenGLEDActive High
D2RedRLEDActive High
D3RedDONEActive LowDONE pin


Power and Power-On Sequence

Page properties
hiddentrue
idComments
In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:
  • Power on-sequence
  • Power distribution
  • Voltage monitoring circuit


Note
For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" .


Power Supply

Power supply with minimum current capability of 3A for system startup is recommended.

The on-board voltages of the carrier board will be powered up with an external power-supply with nominal voltage of 3.3V.

Power Consumption

Scroll Title
anchorTable_PWR_PC
titlePower Consumption

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

Power Input PinTypical Current
3.3V* TBD


* TBD - To Be Determined

Power Distribution Dependencies

3.3V can be supplied through Pin Headers on specific pins. 

Scroll Title
anchorFigure_PWR_PD
titlePower Distribution


Scroll Ignore
draw.io Diagram
borderfalse
viewerToolbartrue
fitWindowfalse
diagramDisplayName
lboxtrue
revision9
diagramNameTEBA0714_PWR_PD
simpleViewerfalse
width
linksauto
tbstylehidden
diagramWidth640


Scroll Only
Image Added


Power-On Sequence

There is no specific power-on sequence. After power on, the module and carrier will be powered on.

Scroll Title
anchorFigure_PWR_PS
titlePower Sequency


Scroll Ignore
draw.io Diagram
borderfalse
viewerToolbartrue
fitWindowfalse
diagramDisplayName
lboxtrue
revision3
diagramNameTEBA0714_PWR_PS
simpleViewerfalse
width
linksauto
tbstylehidden
diagramWidth640


Scroll Only
Image Added


Power Rails

Scroll Title
anchorTable_PWR_PR
titleModule power rails.

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

Power Rail Name

B2B , JM1 Pin

B2B JM2 Pin

Pin Header J17Pin Header J20Pin Header J3Pin Header J4DirectionNotes
3.3V99,97-5, 465, 4655Input
1.8V-18----InputComes from Module
3.3V_OUT8354---6Output
VCCIO3461--45--OutputVariable voltage level
V_CFG53-----InputVariable voltage level

Power Supply

Power supply with minimum current capability of 1A for system startup is recommended.

Power Consumption

...

anchorTable_PWR_PC
titlePower Consumption

...

* TBD - To Be Determined

Power Distribution Dependencies

...

anchorFigure_PWR_PD
titlePower Distribution

...

Scroll Only

Image Removed

Power-On Sequence

...

anchorFigure_PWR_PS
titlePower Sequency
Scroll Ignore

Create DrawIO object here: Attention if you copy from other page, objects are only linked.

Scroll Only

image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed

Power Rails

Notes
Scroll Title
anchorTable_PWR_PR
titleModule power rails.
Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
stylewidths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue
Power Rail Name

B2B Connector

JM1 Pin

B2B Connector

JM2 Pin

B2B Connector

JM3 Pin

Direction


Board to Board Connectors

Page properties
hiddentrue
idComments
  • This section is optional and only for modules.
  • use "include page" macro and link to the general B2B connector page of the module series,For example: 6 x 6 SoM LSHM B2B Connectors
    Include Page
    PD:
    6 x 6 SoM LSHM B2B Connectors
    PD:
    6 x 6 SoM LSHM B2B Connectors

? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.

3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)

TEBA0714 carrier use two  Samtec Razor Beam LSHM Connectors on the bottom side.

Include Page
4 x 5 SoM LSHM B2B Connectors
4 x 5 SoM LSHM B2B Connectors

...

Technical Specifications

Absolute Maximum Ratings

Scroll Title
anchorTable_TS_AMR
titlePS absolute maximum ratings

Scroll Table Layout
orientationportrait
sortDirectionASC
repeatTableHeadersdefault
style
widths
sortByColumn1
sortEnabledfalse
cellHighlightingtrue

SymbolsDescriptionMinMaxUnit
VINInput Supply Voltage-0.36
V
V
V
T_STRStorage Temperature-40125°C
VVVVV