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Table of Contents

Table of Contents

Overview

The carrier board TEB0745 was especially designed and developed for the use of Trenz Electronic module TE0745. 

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Notes :

Key Features

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Note:
Use 'Key Features' description in shoping page, for example: https://shop.trenz-electronic.de/de/TE0728-04-1Q-SoC-Micromodul-mit-Xilinx-Automotive-Zynq-7020-512-MByte-DDR3L-6-x-6-cm

  • Module: Form factor 20 cm x 23,1 cm
    • Trenz Electronic Module TE0745
    • Temperature: -40 to 85 °C
  • On Board: TE0745 Module Socket (3 x Samtec connectors)
    • 24V power supply
    over ARKZ950/2 connecting
    • terminal
    • 1 x EMI Network Filter
    • 3 x Variable Step Down Regulator Module (VDRM) with head sink
    • 2 x Synchronous Buck Regulator
    • 2 x Button (User / Reset)
    • 2 x LED (Green)
  • Interfaces:
    • 1 x XMOD (TE0790) Pin Header (JTAG / UART)
    • 1 x Pin Header (JTAG)
    • 1 x microSD connector
    • 1 x RJ45 Ethernet connector
    • 1 x USB Host Connector
    • 8 x SFP-Connector
    • 6 x Pin Header 50 pol. (FPGA Bank I/O's and Power)
    • 6 x Pin Header 12 pol. (FPGA Bank I/O's and Power)
    • 1 x battery holder
    • 2 x DIP Switch Array (VCC_HR_B / Modi)
  • 2 x Button (User / Reset)
  • 2 x LED (Green)Dimension: 200 mm x 231 mm

Block Diagram

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Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


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titleTExxxx TEB0745 block diagram


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Main Components

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Main Components

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Notes :

  • Picture of the PCB (top and bottom side
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Notes :

  • Picture of the PCB (top and bottom side) with labels of important components
  • Add List below


Note

For more information regarding how to add board photoes, Please refer to "Diagram Drawing Guidline" .


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titleTExxxx TEB0745 main components


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  4. ........

Initial Delivery State

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Notes :

Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

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titleInitial delivery state of programmable devices on the module

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Storage device name

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Content

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Notes

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Quad SPI Flash

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  1. SFP+ Connector, J4 J6 J8 J10 J13 J15 J18 J20
  2. Board to Board Connector (B2B), J1 J2 J3
  3. RJ45 Gigabit Ethernet connector, J22
  4. SD card connector, J16
  5. USB connector, J41
  6. Push Button, S2 S3
  7. SDIO port expander, U15
  8. Power distribution switch, U4
  9. Battery holder, B1
  10. Mag I3C power, U26 U12 U5
  11. Push bottun switch, S1 S4
  12. Buck regulator, U6 U7
  13. I2C EEPROM, U33
  14. Low voltage chanel I2C switch, U16
  15. Overvoltage, undervoltage, reversesupply protection controller, U13
  16. EMI suppression filter, U29
  17. JTAG interface, J12
  18. Power jack, J31
  19. 8bit IO expandor for I2C bus, U18 U25
  20. Pin Headers J23...26 (Not Assembled)
  21. Pin Headers J27-J28-J32-J36 (Not Assembled)
  22. Pin Headers J37...40 (Not Assembled)

Initial Delivery State

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Configuration Signals

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Notes :

Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture.

If there is no components which might have initial data ( possible on carrier) you must keep the table empty

Overview of Boot Mode, Reset, Enables.


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titleBoot process.Initial delivery state of programmable devices on the module

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Storage device name

Content

Notes

EEPROMEUI-64 number programmed

Can be used for MAC



Configuration Signals

Boot Mode
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  • Overview of Boot Mode, Reset, Enables.

MODE Signal State


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MODE Signal State

Connected toB2B
I/ONote

Signals, Interfaces and Pins

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  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

StatusBoot Mode

BOOTMODE

S1J2-133OpenQSPI
ShortSD Card



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titleReset process.

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titleGeneral PL I/O to B2B connectors information

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Schematic

Connected to
FPGA Bank
B2B
Connector
I/O Signal CountVoltage LevelNotes

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JTAG access to the TExxxx SoM through B2B connector JMX.

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titleJTAG pins connection
Note
RST_IN_N

Push Button, S2

J2-131Low Active Reset


Signals, Interfaces and Pins

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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

Board to Board (B2B) I/Os

FPGA bank number and number of I/O signals connected to the B2B connector:

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titleGeneral PL I/O to B2B connectors information

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JTAG Signal

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B2B Connector

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MIO Pins

you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

B2B
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MIO PinConnected toB2BNotes
MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

J2QSPI
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titleMIOs pins

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B2B ConnectorInterfacesNumber of I/O
MIO PinConnected to
Notes

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Notes :

  • add subsection for every component which is important for design, for example:
    • Two 100 Mbit Ethernet Transciever PHY
    • USB PHY
    • Programmable Clock Generator
    • Oscillators
    • eMMCs
    • RTC
    • FTDI
    • ...
    • DIP-Switches
    • Buttons
    • LEDs
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Notes :

In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection

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titleOn board peripherals

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Quad SPI Flash Memory

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Notes :

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J1

User I/O

48 singel ended, 24 Differential

2 singel ended

Connected to Bank 13

48 singel ended, 24 Differential

2 singel ended

Connected to Bank 12
JTAG Interface5 single endedTCK, TDI, TMS, TDO, JTAG_EN
SFP+ Connector8 DiffSPF4....7_RX_N/P , SPF4....7_TX_N/P
J2

Ethernet PHY4 Differential
2 single endedPHY_LED0...1
USB1 DifferentialOTG_N/P
Control Signals3 single endedPS_SRST, BOOTMODE, RST_IN_N
Power Control Signal2 single endedPWR_PS_OK, PWR_PL_OK
I2C Bus2 single endedI2C_SDA, I2C_SCL
User I/O4 single endedMIO12...15

J3


User I/O6 Single endedMIO46...51
SD Card Connector6 Single endedSD_CLK, SD_CMD, SD_DAT0...3 (MIO40...45)
SFP+ Connector8 DifferentialSPF0....3_RX_N/P , SPF0....3_TX_N/P


XMOD Pin Header

JTAG access to the TEB0745 SoM is available through B2B connector JB1 and JB2. JTAG_EN is connected to J1-138, JTAG_EN can be activated through DIP Switch S1-2.

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titleQuad SPI interface MIOs and JTAG pins connection

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MIO Pin
Designator
SchematicU?? PinNotes

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titleI2C interface MIOs and pins

Connected to

B2B Pin

XMOD Header JB1Note
AMIO15J2-129JB1-3UART TX - Input to the module
BMIO14J2-127JB1-7UART RX - Output of the module
CTCKJ1-143JB1-4JTAG interface signal
DTDOJ1-145JB1-8JTAG interface signal
FTDIJ1-142JB1-10JTAG interface signal
HTMSJ1-144JB1-12

JTAG interface signal

GRST_IN_NJ2-131JB1-11RESET will be connected to Push Button on JTAG Programmer


There is a DIP switch, S2, on TE0790 adapter which must be set as following.

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titleI2C Address for RTC

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Notes
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titleI2C EEPROM interface MIOs and pins Xmod Adapter DIP-Switch Setting Description

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MIO PinSchematicU?? Pin
DIP Switch,S2DefaultDescription
1ONUpdate Mode JTAG access to SC CPLD only
2OFFMust be always in OFF state.
3OFFVIO is supplied from Module
4ON3.3V  from XMOD


SFP+ Connectors

The TEB0745 is equipped with 8 SFP+ Connectors, 

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titleI2C address for EEPROMSFP Connectors

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MIO
Pin
I2C Address
Connected to 
Designator
Notes