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Table of Contents
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Overview
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Block Diagram
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Storage device name
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Content
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Notes
Configuration Signals
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Initial Delivery State
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Notes : Only components like EEPROM, QSPI flash can be initialized by default at manufacture. If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
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anchor | Table_OV_IDS |
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title | Initial delivery state of programmable devices on the module |
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- Overview of Boot Mode, Reset, Enables.
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MODE Signal State
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anchor | Table_OV_RST |
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title | Reset process. |
Signals, Interfaces and Pins
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Board to Board (B2B) I/Os
FPGA bank number and number of I/O signals connected to the B2B connector:
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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SPI_CS , SPI_DQ0... SPI_DQ3
SPI_SCK
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anchor | Table_SIP_MIOs |
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title | MIOs pins |
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Test Points
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id | Comments |
you must fill the table below with group of Test Point which are indicated as TP in a schematic. If there is no Test Point remarked in the schematic, delet the Test Point section.
Example:
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anchor | Table_SIP_TPs |
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title | Test Points Information |
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JTAG access to the TExxxx SoM through B2B connector JMX.
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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JTAG Signal
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B2B Connector
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MIO Pins
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id | Comments |
you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.
Example:
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On-board Peripherals
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Notes :
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Notes : In the on-board peripheral table "chip/Interface" must be linked to the corresponding chapter or subsection |
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anchor | Table_OBP |
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title | On board peripherals |
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Quad SPI Flash Memory
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
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anchor | Table_OBP_SPI |
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title | Quad SPI interface MIOs and pins |
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anchor | Table_OBP_I2C_RTC |
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title | I2C Address for RTC |
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LEDs
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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DDR3 SDRAM
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Notes : Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3) |
The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.
- Part number:
- Supply voltage:
- Speed:
- NOR Flash
- Temperature:
Ethernet
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anchor | Table_OBP_ETH |
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title | Ethernet PHY to Zynq SoC connections |
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CAN Transceiver
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anchor | Table_OBP_CLK |
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title | Osillators |
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Programmable Clock Generator
There is a programmable clock generator on-board (U??) provided in order to generate variable clocks for the module. Programming can be done using I2C via PIN header J??. The I2C Address is 0x??.
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anchor | Table_OBP_PCLK |
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title | Programmable Clock Generator Inputs and Outputs |
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IN0
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XAXB
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Power and Power-On Sequence
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id | Comments |
In 'Power and Power-on Sequence' section there are three important digrams which must be drawn:
- Power on-sequence
- Power distribution
- Voltage monitoring circuit
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For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" . |
Power Supply
Power supply with minimum current capability of xx A for system startup is recommended.
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* TBD - To Be Determined
Power Distribution Dependencies
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anchor | Figure_PWR_PD |
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title | Power Distribution |
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Power-On Sequence
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anchor | Figure_PWR_PS |
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title | Power Sequency |
Scroll Ignore |
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Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
Voltage Monitor Circuit
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anchor | Figure_PWR_VMC |
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title | Voltage Monitor Circuit |
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Create DrawIO object here: Attention if you copy from other page, objects are only linked. |
Scroll Only |
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image link to the generate DrawIO PNG file of this page. This is a workaround until scroll pdf export bug is fixed |
Power Rails
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anchor | Table_PWR_PR |
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title | Module power rails. |
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B2B Connector
JM1 Pin
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B2B Connector
JM2 Pin
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B2B Connector
JM3 Pin
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Bank Voltages
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Bank
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Voltage
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id | Comments |
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use "include page" macro and link to the general B2B connector page of the module series,
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? x ? modules use two or three Samtec Micro Tiger Eye Connector on the bottom side.
3 x REF-??????? (compatible to ????????), (?? pins, ?? per row)
Operating Temperature: -??°C ~ ??°C
Current Rating: ??A per ContactNumber of Positions: ??
Number of Rows: ??
Technical Specifications
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Recommended Operating Conditions
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Physical Dimensions
Module size: ?? mm × ?? mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: ? mm.
PCB thickness: ?? mm.
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id | Comments |
In 'Physical Dimension' section, top and bottom view of module must be inserted, information regarding physical dimensions can be obtained through webpage for product in Shop.Trenz, (Download> Documents> Assembly part) for every SoM.
For Example: for Module TE0728, Physical Dimension information can be captured by snipping tools from the link below:
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For more information regarding how to draw diagram, Please refer to "Diagram Drawing Guidline" . |
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anchor | Figure_TS_PD |
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title | Physical Dimension |
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Currently Offered Variants
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id | Comments |
Set correct link to the shop page overview table of the product on English and German.
Example for TE0728:
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For Baseboards or modules, where no overview page is available (and revision number is coded in the direct link) use shop search link, e.g. TE0706:
ENG Page: https://shop.trenz-electronic.de/en/search?sSearch=TE0706
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Revision History
Hardware Revision History
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Set correct links to download arrier, e.g. TE0706 REV02: TE0706-02 -> https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0706/REV02/Documents Note:
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anchor | Table_RH_HRH |
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title | Hardware Revision History |
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