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- 3 x Samtec ASP-122953-01 160-pin stackable, compatible with TE0782TE078x
- 2 mm MC LB2-A soldered Soldered Connector for power supply (12V input)
- 4 SMA connectors for MGT (1xTX 1xRX)
- 2 x 12 pin headers for XMOD
- 1 x DIP switch for modules CPLD Access
- 2 x RJ45 Connector
- USB A Stacked Connector
- Equipped with two TE0790 XMOD FTDI JTAG adapters, TE0790 and TE0790-xxL
- Voltage regulator for 5V and 3.3Vregulators
- Dimension: 115 x 115 mm
- Two preassembled TE0790 XMOD FTDI JTAG adapters
Block Diagram
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add drawIO object here.
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anchor | Figure_OV_BD |
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title | TEBT0782 block diagram |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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lbox | true |
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revision | 712 |
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diagramName | TEBT0782_OV_BD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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Main Components
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anchor | Figure_OV_MC |
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title | TEBT0782 main components |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 58 |
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diagramName | TEBT0782_OV_MC |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 440 |
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- RJ45 Transceivers, J1-J2
- USB A Stacked, U7
- XMOD JTAG/UART BaseAdapter, J7
- JTAG CPLD Adapter -J8
- 2 Line Common Mode Choke, J10
- Non-isolated power jack (VIN), J9-J11
- DIP Switch, S1
- SMA Coxial Connectors (MGT_TX), J3-J4
- SMA Coxial Connectors (MGT_RX), J5-, J3...J6
- Board to Board ConnectorsConnector, JB1...JB3
- Board to Board Connector, JB3
- Board to Board Connector, JB2
Initial Delivery Initial Delivery State
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Notes : Only components like EEPROM, QSPI flash and DDR3 can be initialized by default at manufacture. If there is no components which might have initial data ( possible on carrier) you must keep the table empty |
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- Overview of Boot Mode, Reset, Enables.
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The general Reset is provided through button S1 on TE0790 XMOD J7.
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anchor | Table_OV_RST |
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title | Reset process. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | B2B | Note |
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RESIN | JBC3-130 | Board Reset |
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Notes : - For carrier or stand-alone boards use subsection for every connector type (add designator Designator on description, not on the subsection title), for example:
- For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
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anchor | Table_SIP_B2B |
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title | General I/O to B2B connectors information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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sortEnabled | false |
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cellHighlighting | true |
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B2B Connector | Interface | Number of I/O | Notes |
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JB1
| RJ45, J1B-J1C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | RJ45, J1A | 4 Differential pair, 8 Single Ended | PHY1 MDIO | RJ45, J2B-J2C | 1 Differential pair, 2 Single Ended | Yellow, Green LEDs | RJ45, J2A | 4 Differential pair, 8 Single Ended | PHY2 MDIO | TE0790 Base, J8 | 4 Single Ended |
| TE0790 Base, J7 | 1 Single Ended |
| USB A Stacked, U7 | 2 Single Ended | USB | Power Switch, U1 | 2 Single Ended |
| SMD Line Filter, L6 | 1 Differential pair, 2 Single Ended | USB1_D | SMD Line Filter, L7 | 1 Differential pair, 2 Single Ended | USB2_D | ESD protection diode, U5 | 1 Single Ended | USB1_VBUS | ESD protection diode, U8 | 1 Single Ended | USB2_VBUS | JB2
| Module TE078x FPGA, Bank 111-112 | 16 Differential pair, 32 Single Ended | MGT_RX8...15, MGT_TX8...15 | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B34_VRP, J1_B34_VRN | Module TE078x FPGA, Bank 34 | 1 Differential pair, 2 Single Ended | J1_B33_VRP, J1_B33_VRN | JB3
| TE0790 Base, J8 | 4 Single Ended | M_TCK, M_TMS, M_TDO, M_TDI | TE0790 Base, J7 | 4 Single Ended 2 Single Ended 1 Single Ended | TCK, TMS, TDO, TDI UART RX/TX RESIN | DIP Switch, S1-A | 1 Single Ended | JTAGENB | SMA Coaxial, J3...6 | 2 Differential pair, 4 Single Ended | MGT_RX0, MGT_TX0 | Module TE0782...4 FPGA, Bank 109-110 | 16 Differential pair, 32 Single Ended | MGT_RX1...7, MGT_TX0...7 |
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JTAG Interface
JTAG/UART to Module SoC/FPGA
JTAG Two JTAGs access to the TEBT0782 TE078x SoM are is available through B2B connector JB3. JTAGENB is connected to DIP Switch S1-A JTAG access is provided by TE0790 XMOD Adapter on Pin Header J7.
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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TE0790 BaseJTAG Signal Name | B2B Connector | Notes |
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J8TMS142CPLD JTAG | TDI147CPLD JTAG | TDO148CPLD TCK141CPLD J8MTMSJB3B182JTAGM_JB3B187M_TDOJB3B-188 | JTAG | M_TCK | JB3B-181 | JTAG | |
UART
JB3C-130 | General Reset | H | TMS | JB3C-142 | JTAG | 3.3V | 3.3V_M | JB1- JB3 |
| VIO | 3.3V_M | JB1- JB3 | 3.3V |
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JTAG/ GPIO to Module CPLD
JTAG access to the System Controller CPLD is provided through B2B connector J3. JTAG access to CPLD is provided by TE0790 XMOD Adapter on Pin Header J8.
Pin 'JTAGENB' must be set high, using DIP Switch S1-A in order to program the System Controller CPLD via JTAG interaface.
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anchor | Table_SIP_CPLDJTG |
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title | CPLD JTAG pins connection |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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JTAG Interface Pins | Signal Name | B2B Connector | Notes |
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A | CPLD_GPIO0 | JB1A-10 |
| B | CPLD_GPIO1 | JB1A-12 |
| C | M_TCK | JB3B-81 |
| D | M_TDO | JB3B-88 |
| E | CPLD_GPIO2 | JB1A-14 |
| F | M_TDI | JB3B-87 |
| G | CPLD_GPIO3 | JB1A-16 |
| H | M_TMS | JB3B-82 |
| 3.3V | 3.3V_CPLD | JB1- JB3 |
| VIO | 3.3V_CPLD | JB1- JB3 | 3.3V |
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DIP Switch S2 on TE0790 must be set and fixed like the following table.
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anchor | Table_SIP_JTG_UARTDIP |
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title | UART PinsXMOD DIP Switch Setting |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal StateB2BXMOD_A | JB3C- 129 | Used as UART TX line | XMOD_B | JB3C- 135 | Used as UART RX line |
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S2-1 | ON | JTAGENB (Enable/Disable module JTAG CPLD IOs) | S2-2 | OFF | NC | S2-3 | OFF | NC | S2-4 | OFF | NC |
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RJ45 Connectors
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anchor | Table_SIP_RJ45 |
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title | RJ45s Connections to B2B Connectors |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal Name | RJ45-J1 Pin | RJ45-J2 Pin | Notes |
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B2B |
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PHY_MDI0_P | JB1A-23 | JB1A-39 |
| PHY_MDI0_N | JB1A-21 | JB1A-37 |
| PHY_MDI1_P | JB1A-19 | JB1A-35 |
| PHY_MDI1_N | JB1A-17 | JB1A-33 |
| PHY_MDI2_P | JB1A-15 | JB1A-31 |
| PHY_MDI2_N | JB1A-13 | JB1A-29 |
| PHY_MDI3_P | JB1A-11 | JB1A-27 |
| PHY_MDI3_N | JB1A-9 | JB1A-25 |
| J2_TX9_P | JB1A-95 | - | LED Green/Yellow | J2_TX9_N | JB1A-97 | - | LED Green/Yellow | J2_RX9_N | - | JB1A-96 | LED Green/Yellow | J2_RX9_P | - | JB1A-98 | LED Green/Yellow |
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USB A Stacked Socket
The USB A Stacked , (U7) is a dual port USB Socket which provides two USB connectorsports.
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anchor | Table_SIP_USB |
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title | Dual Port USB Connections |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal Name | Port A | Port B | Notes |
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B2B | Connected to | B2B | Connected to |
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USB_D_P | JB1A-28 | SMD Line Filter, L7 | JB1A-40 | SMD Line Filter, L6 |
| USB_D_N | JB1A-26 | SMD Line Filter, L7 | JB1A-38 | SMD Line Filter, L6 |
| USB_VBUS | JB1A-24 | SMD Line Filter, L7 | JB1A-36 | SMD Line Filter, L6 |
| VBUS_V_EN | JB1A-30 | Power Switch, U1 | JB1A-32 | Power Switch, U1 |
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SMA Coaxial
The TEBT0782 carrier is equipped with 4x SMA Coaxial straight connectors.
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anchor | Table_SIP_SMA |
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title | SMAs Connections |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Schematic | B2B | Notes |
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J3 | MGT_TX0_N | JB3A-29 | Transfer | J4 | MGT_TX0_P | JB3A-31 | Transfer | J5 | MGT_RX0_N | JB3A-30 | Receive | J6 | MGT_RX0_P | JB3A-32 | Receive |
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Test Points
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anchor | Table_SIP_TestPoint |
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title | Test Points Information |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Test Point | Signals | B2B Connector | Notes |
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TP 1 | VBAT_I | JB3-124 |
| TP 2 | OTG2_ID | JB1-22 |
| TP 3 | OTG1_ID | JB1-34 |
| TP 4 | USB1_VBUS | JB1-36 |
| TP 5 | USB2_VBUS | JB1-24 |
| TP 6 | M_TCK | JB3-81 |
| TP 7 | M_TDO | JB3-88 |
| TP 8 | M_TDI | JB3-87 |
| TP 9 | M_TMS | JB3-82 |
| TP 10 | TCK | JB3-141 |
| TP 11 | TDO | JB3-148 |
| TP 12 | TDI | JB3-147 |
| TP 13 | TMS | JB3-142 |
| TP 14 | VIN | JB1-165...168 |
| TP 15 | 5V | - |
| TP 16 | 3.3V_CPLD | JB1-147...148 |
| TP 17-18 | GND | - |
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On-board Peripherals
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
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anchor | Table_OBP_DIP |
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title | DIP Switch Connections |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Switch | Connected to | B2B | Notes |
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S1-A | JTABENB | JB3C-36136 |
| S1-B...D | - | -- | Not connected |
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Power and Power-On Sequence
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Power supply with minimum current capability of 4 A 3A for system startup is recommended.
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* TBD - To Be Determined
Power Distribution DependenciesDistribution Dependencies
12V power supply (VIN) on J9/J11 (2 mm MC LB2-A solder-in) or on J10 (TE1.5/2-3.5H).
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anchor | Figure_PWR_PD |
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title | Power Distribution |
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scroll-pdf | false |
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scroll-office | true |
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scroll-chm | true |
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scroll-docbook | true |
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scroll-eclipsehelp | true |
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scroll-epub | true |
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scroll-html | true |
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| draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 27 |
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diagramName | TEBT0784_PWR_PD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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Image RemovedImage Added |
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Power-On Sequence
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anchor | Figure_PWR_PS |
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title | Power Sequency |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 49 |
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diagramName | TEBT0782_PWR_PS |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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anchor | Table_PWR_PR |
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title | Module power rails. |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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JM1 JM2 B2B JM3 VoltageDirection | Notes |
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VIN | 165, 166, 167, 168 | - | - | 12 V | Input/Output | Directly to module | 3.3V_M | 99, 100, 111,112, 123, 124, 135, 136, 159, 160, 169, 170, 171, 172 | - | 99, 100, 159, 160 | 3.3 VInput/Output | 160, 169, 170, 171, 172 are output other ones input for IO Banks | 3.3V_CPLD | 147,148 | - | - | 3.3 VOutput | Directly to module | 1.8V_M | - | 99,100 | , 159, 160, , 159, 160, 169, 170, 171, 172 | 124 | Input/Output | 169, 170, 171, 172 |
124 | 1.8 Vare output other ones input for IO Banks | VBAT_IN |
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Board to Board Connectors
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- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
Include Page |
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| PD:6 x 6 SoM LSHM B2B ConnectorsPD: |
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| 6 x 6 SoM LSHM B2B Connectors |
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Include Page |
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| 8.5 x 8.5 SoM QSH and QTH B2B Connectors |
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| 8.5 x 8.5 SoM QSH and QTH B2B Connectors |
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The TEBT0782 has three 160-pin double-row ASP-122953-01 Samtec connectors on the bottom side which mate with ASP-122951-01 Samtec connectors on the baseboard. Mating height is 5 mm.
Technical Specifications
Absolute Maximum Ratings
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anchor | Table_TS_AMR |
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title | PS absolute maximum ratings |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Symbols | Description | Min | Max | Unit | Note |
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VIN | Input supply voltage | 012-- | V | Attention: Depends on connected module! 171050601 of the TEBT0782 (-0,3V - 40V) | T_STG | Storage Temperature | -40 | +85 | °C | DIP Switch S1 |
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Recommended Operating Conditions
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anchor | Table_TS_ROC |
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title | Recommended operating conditions. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Parameter | Min | Max | Units | Reference Document |
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VIN | 12See Xilinx ???? datasheet.Attention: Depends on connected module! See TE078x TRMs, recommended normally 12V Without module: 171050601 of the TEBT0782 (6V - 36V) | T_ | STGSee Xilinx ???? datasheet.
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Physical Dimensions
Module size: 116 mm × 116 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 5 mm.
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Scroll Title |
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anchor | Figure_TS_PD |
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title | Physical Dimension |
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Scroll Ignore |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 1 |
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diagramName | TEBT0782_TS_PD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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Scroll Only |
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scroll-pdf | true |
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scroll-office | true |
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scroll-chm | true |
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scroll-docbook | true |
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scroll-eclipsehelp | true |
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scroll-epub | true |
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scroll-html | true |
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| Image Modified |
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Currently Offered Variants
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Scroll Title |
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anchor | Table_RH_HRH |
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title | Hardware Revision History |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Changes | Documentation Link |
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52016-11-201605 | 01- | Initial Release | REV01 |
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Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
Scroll Title |
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anchor | Figure_RV_HRN |
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title | Board hardware revision number. |
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Scroll Ignore |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 34 |
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diagramName | TEBT0782_RH_HRN |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 160203 |
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Scroll Only |
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Document Change History
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Scroll Title |
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anchor | Table_RH_DCH |
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title | Document change history. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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style | |
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widths | |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Date | Revision | Contributor | Description |
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Page info |
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infoType | Modified date |
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dateFormat | yyyy-MM-dd |
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type | Flat |
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| Page info |
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infoType | Current version |
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prefix | v. |
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type | Flat |
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showVersions | false |
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| Page info |
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infoType | Modified by |
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type | Flat |
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showVersions | false |
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change list | | 2019-10-8 | v.45 | John Hartfiel | update power section - XMOD section
| 2019-10-16 | v.44 | Pedram Babakhani | | -- | all | Page info |
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infoType | Modified users |
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type | Flat |
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showVersions | false |
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